Results 31 to 40 of about 317,981 (244)
Design of a low-noise aeroacoustic wind tunnel facility at Brunel University [PDF]
This paper represents the design principle of a quiet, low turbulence and moderately high speed aeroacoustic wind tunnel which was recently commissioned at Brunel University.
Kim, JH +5 more
core +1 more source
The development of magnetic tunnel junction fabrication techniques [PDF]
The discovery of large, room temperature magnetoresistance (MR) in magnetic tunnel junctions in 1995 sparked great interest in these devices. Their potential applications include hard disk read head sensors and magnetic random access memory (MRAM ...
core +2 more sources
In this paper, the influences of channel transport on the output characteristic in sub-100nm heterojunction tunnel FET have been investigated through TCAD simulation.
Yunhe Guan +3 more
doaj +1 more source
Compact modeling of DG-Tunnel FET for Verilog-A implementation
In this work, a compact model based on an analytical closed form solution of the 1D Poisson's equation for a double-gate Tunnel FET is derived. Furthermore, the current levels are estimated by implementing an algorithm based on the Kane's band-to-band ...
Antonios Bazigos +7 more
core +1 more source
Tunnel FET device characteristics for RF energy harvesting passive rectifiers [PDF]
The lack of high power conversion efficiency in RF passive rectifier circuits at sub-µW power levels with current MOSFET technologies is directly related with the difficulty of the transistors in conducting the required level of current at low voltage ...
Nunes Cavalheiro, David Manuel +1 more
core +1 more source
Strained Si and SiGe Nanowire Tunnel FETs for Logic and Analog Applications
Guided by the Wentzel-Kramers-Brillouin approximation for band-to-band tunneling (BTBT), various performance boosters for Si TFETs are presented and experimentally verified.
Qing-Tai Zhao +11 more
doaj +1 more source
The physical realization of artificial neurons is a critical challenge for energy‐efficient neuromorphic computing. This review presents a comprehensive analysis of the evolution of artificial neuron implementations from conventional CMOS to emerging post‐CMOS technologies.
Kannan Udaya Mohanan +4 more
wiley +1 more source
Multi‐Level Saturation Current Encoding in Two‐Dimensional Ferroelectric Source‐Gated Transistors
A 2D ferroelectric source‐gated transistor (SGT) operates with a non‐volatile, multi‐level saturation current controlled by ferroelectric polarization. Operando electrostatic and photocurrent imaging link the current limitation to source‐side depletion, identifying saturation current as a programmable, read‐bias‐tolerant device parameter toward low ...
Joon‐Seok Kim +3 more
wiley +1 more source
USe3 is introduced as an actinide van der Waals semiconductor that mirrors the quasi‐one‐dimensional physics of transition‐metal trichalcogenides. Polarization‐resolved Raman spectroscopy on exfoliated flakes maps strong in‐plane phonon anisotropy and strain‐tunable mode shifts.
Aljoscha Söll +17 more
wiley +1 more source
Strained Silicon Complementary TFET SRAM: Experimental Demonstration and Simulations
A half SRAM cell with strained Si nanowire complementary tunnel-FETs (TFETs) was fabricated and characterized to explore the feasibility and functionality of 6T-SRAM based on TFETs. Outward-faced n-TFETs are used as access-transistors.
G. V. Luong +7 more
doaj +1 more source

