Results 51 to 60 of about 1,137 (197)

Steep Slope Field Effect Transistors Based on 2D Materials

Advanced Electronic Materials
With field effect transistor (FET) sustained to downscale to sub‐10 nm nodes, performance degradation originates from short channel effects (SCEs) degradation and power consumption increment attributed to inhibition of supply voltage (VDD) scaling down ...
Laixiang Qin, He Tian, Chunlai Li, Ziang Xie, Yiqun Wei, Yi Li, Jin He, Yutao Yue, Tian‐Ling Ren   +8 more
doaj   +1 more source

Investigation and Simulation of Work-Function Variation for III–V Broken-Gap Heterojunction Tunnel FET

IEEE Journal of the Electron Devices Society, 2015
This paper investigates and compares the impacts of metal-gate work-function variation (WFV) on III-V heterojunction tunnel FET (HTFET), homojunction TFET, and FinFET devices using a novel Voronoi method to capture the realistic metal-gate grain patterns
Chih-Wei Hsu, Ming-Long Fan, Vita Pi-Ho Hu, Pin Su   +3 more
doaj   +1 more source

Neuromorphic Near‐Sensor and In‐Sensor Computing Enabled by Next‐Generation Material‐Based Sensors

Advanced Science, EarlyView.
This Review presents a structural framework that classifies neuromorphic sensing into near‐sensor and in‐sensor architectures, clarifying physical coupling between sensing and computation. The framework connects neural and synaptic device functions with recent advances in optical, mechanical, and chemical sensing, compares energy consumption and ...
Su Yeon Jung, Gwang Ya Kim, Sejin Kim, Hyunjong Seo, Se Gi Lee, Sang Min Won, Dongjoon Rhee, Joohoon Kang   +7 more
wiley   +1 more source

Fabrication Techniques for a Tuneable Room Temperature Hybrid Single-electron Transistor and Field-effect Transistor

Micro and Nano Engineering
Hybrid room-temperature (RT) silicon single-electron – field effect transistors (SET-FETs) provide a means to switch between ‘classical’, high current FET, and low-power SET operation, using a gate voltage.
Kai-Lin Chu, Wenkun He, Faris Abualnaja, Mervyn Jones, Zahid Durrani   +4 more
doaj   +1 more source

MXenes Contacts for p‐type 2D Electronics

Advanced Science, EarlyView.
Solution‐processed MXene contacts are engineered for p‐type 2H‐MoTe2 transistors. By comparing Ti3C2Tx, Nb2CTx, and Mo2CTx, Nb2CTx is identified as the best‐performing contact among the MXenes examined in this work, offering favorable work‐function alignment, low contact resistance, and near‐ohmic hole injection for scalable 2D electronics.
Tianchao Guo, Maolin Chen, Yizhou Wang, Chen Liu, Xiangming Xu, Linqu Luo, Dekang Zhu, Ning Chu, Xiaowen Zhang, Alfonso Caraveo, Thomas D. Anthopoulos, Xixiang Zhang, Husam N. Alshareef   +12 more
wiley   +1 more source

Fundamental Challenges, Physical Implementations, and Integration Strategies for Ising Machines in Large‐Scale Optimization Tasks

Advanced Electronic Materials, EarlyView.
Ising machines are emerging as specialized hardware solvers for computationally hard optimization problems. This review examines five major platforms—digital CMOS, analog CMOS, emerging devices, coherent optics, and quantum systems—highlighting physics‐rooted advantages and shared bottlenecks in scalability and connectivity.
Hyunjun Lee, Joon Pyo Kim, Sanghyeon Kim
wiley   +1 more source

V-Shaped InAs/Al0.5Ga0.5Sb Vertical Tunnel FET on GaAs (001) Substrate With I $_{\text {ON}}=\text {433}\,\,\mu$ A. $\mu$ m $^{-\text {1}}$ at V $_{\text {DS}}= \text {0.5}$ V

IEEE Journal of the Electron Devices Society, 2017
We report on the fabrication of a near broken InAs/Al0.5Ga0.5Sb vertical TUNNEL field effect transistor (TFET). The epitaxial structure is grown on a GaAs (001) substrate thanks to large mismatch accommodation at the GaSb/GaAs interface.
Vinay Kumar Chinni, Mohammed Zaknoune, Christophe Coinon, Laurence Morgenroth, David Troadec, Xavier Wallart, Ludovic Desplanque   +6 more
doaj   +1 more source

A Compendium of Logic Gates Based on Reconfigurable Three‐Independent‐Gate Transistors Realized in FDSOI Hardware

Advanced Electronic Materials, EarlyView.
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez, Yuxuan He, Giulio Galderisi, Violetta Sessi, Niladri Bhattacharjee, Peter Baars, Kerstin Poenisch, Annekathrin Zeun, Konstantin Li, Fernando Koch, Binit Syamal, Thomas Mikolajick, Jens Trommer   +12 more
wiley   +1 more source

Nanotransistor-based gas sensing with record-high sensitivity enabled by electron trapping effect in nanoparticles

Nature Communications
Highly sensitive, low-power, and chip-scale H2 gas sensors are of great interest to both academia and industry. Field-effect transistors (FETs) functionalized with Pd nanoparticles (PdNPs) have recently emerged as promising candidates for such H2 sensors.
Qitao Hu, Paul Solomon, Lars Österlund, Zhen Zhang   +3 more
doaj   +1 more source

Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

Advanced Electronic Materials, EarlyView.
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho, Dae‐won Kim, Yujin Kim, Jung‐Heum Na, Yuwon Jeong, Dong‐Yeop Lee, Shinhyun Choi   +6 more
wiley   +1 more source