Results 61 to 70 of about 1,083 (193)

Investigation and Simulation of Work-Function Variation for III–V Broken-Gap Heterojunction Tunnel FET

IEEE Journal of the Electron Devices Society, 2015
This paper investigates and compares the impacts of metal-gate work-function variation (WFV) on III-V heterojunction tunnel FET (HTFET), homojunction TFET, and FinFET devices using a novel Voronoi method to capture the realistic metal-gate grain patterns
Chih-Wei Hsu, Ming-Long Fan, Vita Pi-Ho Hu, Pin Su   +3 more
doaj   +1 more source

Sustainable Synaptic Device with Two‐Dimensional Ferroelectric Materials for Neuromorphic Computing

Advanced Science, EarlyView.
α‐In2Se3 based FeSFETs can be utilized as sustainable devices through polarization switching governed by both out‐of‐plane and in‐plane polarizations. Upon reaching a fatigued state, current annealing enabled by conductance modulation can significantly enhance the endurance of FeSFETs.
Jaewook Yoo, Seokjin Oh, Minah Park, Jong Min Song, Hongseung Lee, Seohyeon Park, Sojin Jung, Seongbin Lim, Soohyun Lim, Dongsun Shin, Ji Won Heo, TaeWan Kim, Hagyoul Bae   +12 more
wiley   +1 more source

Fabrication Techniques for a Tuneable Room Temperature Hybrid Single-electron Transistor and Field-effect Transistor

Micro and Nano Engineering
Hybrid room-temperature (RT) silicon single-electron – field effect transistors (SET-FETs) provide a means to switch between ‘classical’, high current FET, and low-power SET operation, using a gate voltage.
Kai-Lin Chu, Wenkun He, Faris Abualnaja, Mervyn Jones, Zahid Durrani   +4 more
doaj   +1 more source

SOI Tunnel-FET as a Dual-Technology Transistor

, 2019
In this work we propose for the first time the use of the recently introduced UTBBBE SOI TFET (Ultra-Thin Body and Box Back Enhanced Silicon-On-Insulator Tunnel-FET) operating as a MOSFET device only by changing its bias condition. The principle is based
G. D. Paula Agopian, Carlos Mori, A. B., Martino, Joao A., A. B. Carlos Mori, Joao A. Martino, Paula Agopian, G. D. [UNESP]   +5 more
core   +1 more source

A p-channel GaN heterostructure tunnel FET with high ON/OFF current ratio [PDF]

, 2019
A novel mechanism to achieve a nonambipolar tunnel FET (TFET) is proposed in this paper. The method relies on polarization charge induced in semiconductors, such as group III nitrides, to enhance the electric field across the junction and facilitate ...
Kumar, A., De Souza, M.M.
core   +1 more source

Buried Unstrained Germanium Channels: A Lattice‐Matched Platform for Quantum Technology

Advanced Science, EarlyView.
ABSTRACT Strained germanium (ε$\varepsilon$‐Ge) and strained silicon (ε$\varepsilon$‐Si) buried quantum wells have enabled advanced spin‐qubit quantum processors. However, in the absence of suitable lattice‐matched substrates, ε$\varepsilon$‐Ge and ε$\varepsilon$‐Si are deposited on defective, metamorphic SiGe buffers, which may impact device ...
Davide Costa, Patrick Del Vecchio, Karina Hudson, Lucas E. A. Stehouwer, Alberto Tosato, Davide Degli Esposti, Vladimir Calvi, Luca Moreschini, Mario Lodari, Stefano Bosco, Giordano Scappucci   +10 more
wiley   +1 more source

Double gate tunnel-FET working like a permittivity based biosensor with different drain to gate and drain to biomaterial alignments

, 2019
Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)The goal of this work is to analyze the effect of the drain to gate and to biomaterial alignments on n-type Tunnel-FET (nTFET) working like a permittivity based biosensor.
Agopian, P. G.D. [UNESP], Martino, J. A., Macambira, C. N., Agopian, P. G.D.   +3 more
core   +1 more source

Neuromorphic Near‐Sensor and In‐Sensor Computing Enabled by Next‐Generation Material‐Based Sensors

Advanced Science, EarlyView.
This Review presents a structural framework that classifies neuromorphic sensing into near‐sensor and in‐sensor architectures, clarifying physical coupling between sensing and computation. The framework connects neural and synaptic device functions with recent advances in optical, mechanical, and chemical sensing, compares energy consumption and ...
Su Yeon Jung, Gwang Ya Kim, Sejin Kim, Hyunjong Seo, Se Gi Lee, Sang Min Won, Dongjoon Rhee, Joohoon Kang   +7 more
wiley   +1 more source

Implementation of a DC compact model for double-gate Tunnel-FET based on 2D calculations and application in circuit simulation

, 2016
This paper introduces a two-dimensional physics-based compact model for a double-gate (DG) Tunnel-FET (TFET) implemented in Verilog-A. The compact model is derived from an analytical model published in [1], [2], [3].
Kloes, Alexander, Gia Vinh Luong, Horst, Fabian, Fabian Hosenfeld, Hain, Franziska, Luong, Gia Vinh, Atieh Farokhnejad, Franziska Hain, Zhao, Qing-Tai, Fabian Horst, Michael Graef, Qing-Tai Zhao, Alexander Kloes, Iniguez, Benjamin, Benjamin Iniguez, Graef, Michael, Farokhnejad, Atieh, Hosenfeld, Fabian   +17 more
core   +1 more source

Fundamental Challenges, Physical Implementations, and Integration Strategies for Ising Machines in Large‐Scale Optimization Tasks

Advanced Electronic Materials, EarlyView.
Ising machines are emerging as specialized hardware solvers for computationally hard optimization problems. This review examines five major platforms—digital CMOS, analog CMOS, emerging devices, coherent optics, and quantum systems—highlighting physics‐rooted advantages and shared bottlenecks in scalability and connectivity.
Hyunjun Lee, Joon Pyo Kim, Sanghyeon Kim
wiley   +1 more source