Results 81 to 90 of about 725 (202)

From Classical Ferroelectricity to Emerging Low‐Dimensional Phases

Advanced Physics Research, Volume 4, Issue 11, November 2025.
Ferroelectricity is undergoing a renaissance, moving from classical perovskites to hafnia‐based thin films and low‐dimensional van der Waals crystals. Recent advances reveal exotic polarization mechanisms, ultrathin stability, and coupling with topology and valley physics.
Marius Adrian Husanu, Dana G. Popescu
wiley   +1 more source

Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions

Applied Sciences, 2018
In this work, we demonstrate a strained Si single nanowire tunnel field effect transistor (TFET) with gate-all-around (GAA) structure yielding Ion-current of 15 μA/μm at the supply voltage of Vdd = 0.5V with linear onset at low drain voltages.
Keyvan Narimani, Stefan Trellenkamp, Andreas Tiedemann, Siegfried Mantl, Qing-Tai Zhao   +4 more
doaj   +1 more source

Performance Analysis of a Dual‐Drain Dual‐Gate Schottky Tunnel Field Effect Transistor Biosensor for Non‐Ideal Hybridization

Nano Select, Volume 6, Issue 11, November 2025.
In this study, we analyzed the sensing characteristics of a MoS₂‐based dual‐drain, dual‐gate Schottky tunnel field effect transistor (DD‐DG‐STFET) based on the hybridization process to achieve ground breaking sensitivity. DD‐DG‐STFET sensitivity was calculated by examining steric hindrance across various patterns, including concave and convex, as well ...
Anusuya Periyasami, Prashanth Kumar
wiley   +1 more source

Steep switching in trimmed-gate tunnel FET

AIP Advances, 2018
We propose a tunnel field-effect transistor (TFET) having a trimmed gate (TG) structure, which considerably improves the subthreshold swing (SS). The TG structure truncates the needless long band-to-band tunneling (BTBT) paths to a “channel”, which ...
Hidehiro Asai, Takahiro Mori, Takashi Matsukawa, Junichi Hattori, Kazuhiko Endo, Koichi Fukuda   +5 more
doaj   +1 more source

Advances in MXene‐Based Electronics via Surface and Structural Redesigning and Beyond

Advanced Electronic Materials, Volume 11, Issue 14, September 4, 2025.
Herein, various MXenes surface and structural engineering strategies such as termination control, doping, interlayer design, and heterostructures are reviewed for advanced electronics applications. We discuss how these approaches optimize conductivity, work function, and device integration, enabling breakthroughs in transistors, photodetectors, and ...
Adnan Younis, Edvin Idrisov, Saleh Thaker, Fathalla Hamed, El Hadi Sadki, Muhammad Zafar Iqbal, Tariq Mahmood, Babar Shabbir, Qiaoliang Bao   +8 more
wiley   +1 more source

A Reconfigurable Ferroelectric Transistor as An Ultra‐Scaled Cell for Low‐Power In‐Memory Data Processing

Advanced Electronic Materials
Compact in‐memory computing architectures are desirable to embed artificial intelligence (AI) in resource‐restricted edge devices. However, current technologies face limitations in both the area and energy efficiency. Here, a reconfigurable ferroelectric
Zhongyunshen Zhu, Anton E. O. Persson, Lars‐Erik Wernersson   +2 more
doaj   +1 more source

Impact of band to band Tunneling on Transient performance of Dual Gate Tunnel Field Effect Transistor (TFET)

International Journal of Innovative Technology and Exploring Engineering, 2019
Tunnel Field Effect Transistor (TFET) is gated reverse biased P-I-N diode structured semiconductor device and can be considered as a reliable low power device. TCAD (Sentaurus 2D) simulations for various Gate metal work function (4.1-4.3 eV) shows that its ON-current (ION) arises from quantum mechanical band-to-band tunneling (B2BT) and observed that ...
Deepak Kumar, Raj Gaurav Mishra, Ranjan Mishra, Amit Kumar Shrivastava   +3 more
openaire   +1 more source

Alloy Engineered Nitride Tunneling Field-Effect Transistor: A Solution for the Challenge of Heterojunction TFETs

IEEE Transactions on Electron Devices, 2019
Being fundamentally limited to a current–voltage steepness of 60mV/dec, MOSFETs struggle to operate below 0.6 V. Further reduction in ${V}_{\text {DD}}$ and, consequently, power consumption can be achieved with novel devices, such as tunneling transistors (TFETs) that can overcome this limitation.
Tarek A. Ameen, Hesameddin Ilatikhameneh, Patrick Fay, Alan Seabaugh, Rajib Rahman, Gerhard Klimeck   +5 more
openaire   +1 more source

Roles of Gate-Oxide Thickness Reduction in Scaling Bulk and Thin-Body Tunnel Field-Effect Transistors

, 2017
Tunnel field-effect transistor (TFET) has recently been considered as a promising candidate for low-power integrated circuits. In this paper, we present an adequate examination on the roles of gate-oxide thickness reduction in scaling bulk and thin-body ...
Chun-Hsing Shih, Shih, Chun-Hsing, Anh, Dao Thi Kim, Nguyễn, Đăng Chiến, Chien, Nguyen Dang, Nguyen Dang Chien, Dao Thi Kim Anh   +6 more
core   +1 more source

A New On-Chip ESD Strategy Using TFETs-TCAD Based Device and Network Simulations

IEEE Journal of the Electron Devices Society, 2018
For the first time, this paper reports the quasi-static behavior and the applicability of the tunnel field effect transistor (TFET) for the on-chip electrostatic discharge (ESD) protection. ESD evaluations are performed on 28-nm fully depleted silicon-on-
Radhakrishnan Sithanandam, Mamidala Jagadesh Kumar   +1 more
doaj   +1 more source