Results 61 to 70 of about 12,217,467 (150)

NAND flash memory [PDF]

, 2016
V diplomskem delu so predstavljene arhitekturne lastnosti NAND bliskovnih pomnilnikov skupaj z lastnostmi čipov, ki jih vsebujejo. Obravnavane so različne programske metode upravljanja z NAND bliskovnim pomnilnikom, predstavljena pa je ena izmed možnih ...
UMEK, VLADIMIR
core  

Monolithic Oxidation Enables Ultrathin Vertically Graded Tantalum Oxide for Low‐Voltage, Low‐Variability Memristive Switching

Advanced Functional Materials, Volume 36, Issue 88, 2 November 2026.
Monolithic UV‐ozone oxidation of Ta forms an ultrathin Ta2O5/TaOx bilayer enabling resistive switching with a vertical defect gradient. A stoichiometric surface layer over an oxygen‐deficient sublayer promotes localized filament nucleation near the top interface, enabling low‐voltage operation, and reduced cycle‐to‐cycle variability.
Seunghoon Yang, Dong Hyun Lee, Conan Weiland, Won‐Il Lee, Kim Kisslinger, Mingzhao Liu, Aswin kumar Anbalagan, Xiao Tong, Soumyajit Mandal, Nikhil Tiwale, Houk Jang, Chang‐Yong Nam   +11 more
wiley   +1 more source

Verification of NAND Flash Controller [PDF]

, 2022
NAND structure-based Flash memory-made SSDs are turning more popular than HDDs in several applications notably in consumer microelectronics devices and enterprise memory storage devices. The NAND controller is the heart of this system.
Prajwala, M. J., He, Lili, Desai, Kush
core  

A String-Select-Line Separation Patterning Scheme for Low Voltage and High-Speed Program Operation in 3D NAND Flash Memory With Separated Source-Line

IEEE Access
In this paper, we propose a novel String-Select-Line Separation Patterning (SSP) scheme designed for low voltage and high-speed program operation in 3D NAND flash memory structures with a separated Source-Line (SL).
Jae-Min Sim, Hakyeong Kim, Yun-Heub Song
doaj   +1 more source

Dual-Doped Cylindrical Bit-Line Pad for High-Efficiency Bulk Erase in V-NAND Flash

IEEE Access
We propose a novel dual-doped cylindrical bit-line (DDC-BL) pad structure for vertical NAND (V-NAND) flash memory to enable efficient bulk erase operation through direct hole injection.
Choasub Kim, Jiwook Hong, Moonchurl Kim, Hyoungsub Kim, Jongwook Jeon   +4 more
doaj   +1 more source

Triple‐Level Content‐Addressable Vertical NAND Flash Memory (Adv. Sci. 61/2026)

Advanced Science, Volume 13, Issue 61, 3 November 2026.
Content‐Addressable V‐NAND Flash Memory A blue search beam illuminates the matching path through a towering, multilayer V‐NAND array. The image represents triple‐level content‐addressable V‐NAND, which stores and compares multilevel data in place for fast, energy‐efficient memory searches and AI computing.
Sung‐Ho Park, Jiseong Im, Yeongheon Yang, Ryun‐Han Koo, Jonghyun Ko, Mingyun Oh, Dongbeen Shin, Gyuweon Jung, Jong‐Ho Lee   +8 more
wiley   +1 more source

An efficient fault detection algorithm for NAND flash memory

, 2011
As flash memory gains its momentum in the storage market of embedded systems, existing fault detection algorithms face serious challenges due to the special characteristics of NAND flash memory and the rapid degradation of its reliability.
Tei-Wei Kuo, Chia-Ling Ko, Chih-Wen Hsueh, Po-Chun Huang, Yuan-Hao Chang   +4 more
core   +1 more source

NAND Flash Memory Characterization [PDF]

, 2019
The NAND technology has become a popular research area and implementation choice due to its non-volatile flash memory characteristics. There are many engineering challenges when it comes to NAND technology.
Heer, Tanvir Singh
core   +1 more source

Extreme Bond Ionicity in Mg─Te Chalcogenides for Ultrathin Low Voltage Selector‐Only Memory beyond the Leakage Scaling Limit

Advanced Materials, Volume 38, Issue 58, 16 October 2026.
Mg─Te chalcogenides address the leakage scaling trade‐off in ultrathin selector‐only memory. Structural partitioning in multiphase Mg─Te, combined with highly ionic Mg─Te bonding and Hf interfacial engineering, supports reliable 5 nm thickness operation at low write voltage with suppressed leakage current, narrow threshold voltage distributions, 10 ns ...
Yoori Seo, Dongmin Kim, Yu Bin Park, Jangseop Lee, Tae Hoon Lee, Hyunsang Hwang   +5 more
wiley   +1 more source

Dynamic Forest: An Efficient Index Structure for NAND Flash Memory

, 2009
In this paper, we present an efficient index structure for NAND flash memory, called the Dynamic Forest (D-Forest). Since write operations incur high overhead on NAND flash memory, D-Forest is designed to minimize write operations for index updates.
Yang, Chul-Woong, Lee, Ki Yong, Lee, Yoon Joon, Kim, Myoung Ho   +3 more
core   +1 more source