Results 91 to 100 of about 2,676 (201)

Characterizing the Reliability and Threshold Voltage Shifting of 3D Charge Trap NAND Flash

, 2019
3D charge trap (CT) triple-level cell (TLC) NAND flash gradually becomes a mainstream storage component due to high storage capacity and performance, but introducing a concern about reliability.
Fei Wu, Meng Zhang, Wu, Fei,, Xiangfeng Lu, Changsheng Xie, Zhang, Meng,, Lu, Xiangfeng,, Liu, Weihua,, Xie, Changsheng,, Yifei Wang, Weihua Liu, Zhonghai Lu, Lu, Zhonghai,, Wang, Yifei,   +13 more
core   +1 more source

Optimizing Cell Structure to Improve Cell Characteristics in IGZO Channel-Based 3D NAND Flash With p-Type Gate

IEEE Access
For the first time, a novel IGZO channel-based 3D NAND Flash structure with an embedded p-type poly-Si injection layer is proposed, using integrated structural, material, and operational modifications to address the limitations of the conventional IGZO ...
Sungho Park, Youngho Jung, Daewoong Kang
doaj   +1 more source

Using 3D NAND Flash Memory in SSDs to Improve Storage and Performance

, 2020
[excerpt] In the rapid development process of data storage, 3D NAND is the next generation of this technology in which the semiconductor flash cells of the solid-state drive (SSD) are stacked vertically to increase storage density and read / write ...
Welch, Daniel
core  

Impact of Program–Erase Operation Intervals at Different Temperatures on 3D Charge-Trapping Triple-Level-Cell NAND Flash Memory Reliability

Micromachines
Three-dimensional charge-trapping (CT) NAND flash memory has attracted extensive attention owing to its unique merits, including huge storage capacities, large memory densities, and low bit cost.
Xuesong Zheng, Yifan Wu, Haitao Dong, Yizhi Liu, Pengpeng Sang, Liyi Xiao, Xuepeng Zhan   +6 more
doaj   +1 more source

NAND flash memory technologies

, 2016
This book discusses basic and advanced NAND flash memory technologies, including the principle of NAND flash, memory cell technologies, multi-bits cell technologies, scaling challenges of memory cell, reliability, and 3-dimensional cell as the future ...
Aritome, Seiichi
core  

Low-Power Stack-Level Programming Enabled by Optimized Dummy Word Line Voltage in 3-D NAND Flash Memory

IEEE Journal of the Electron Devices Society
In this paper, we propose a low-power stack-level programming scheme for ultrahigh stack 3D NAND flash memory. As the number of word lines (WLs) increases beyond 300 layers, the increased pass voltage leads to excessive power consumption and reliability ...
Kyungmin Lee, Gunwook Yoon, Seung Jae Baik, Myounggon Kang   +3 more
doaj   +1 more source

Characterization of TLC 3D-NAND Flash Endurance through Machine Learning for LDPC Code Rate Optimization

, 2017
The advent of the 3D-NAND Flash memories introduced significant issues in terms of characterization and system-level optimization that can be performed to increase the memory reliability over its lifetime.
Cristian Zambelli, Evelina Lamma, Alessia Marelli, Giuseppe Cancelliere, Cancelliere, Giuseppe, LAMMA, Evelina, Marelli, Alessia, RIGUZZI, Fabrizio, Micheloni, Rino, Rino Micheloni, ZAMBELLI, Cristian, OLIVO, Piero, Fabrizio Riguzzi, Piero Olivo   +13 more
core   +1 more source

Nanoplate FET와 3D NAND Flash Memory에서 Self Heating Effect 분석

, 2020
학위논문 (박사) -- 서울대학교 대학원 : 공과대학 전기·정보공학부, 2020. 8. 신형철.In this thesis, self-heating effects (SHEs) in three-stacked nanoplate FETs were investigated majorly through the TCAD simulation over various logic device nodes.
김현석
core  

Analysis of Electrostatic Crosstalk in 3D Vertical NAND Charge Trapping Memory with Junction less GAA Nanowire FET

, 2012
The electrostatic crosstalk in the 3D vertical CTM (Charge Trapping Memory) NAND NVM is investigated with various typical operation conditions. The junctionless FET of GAA (Gate-All-Around) nanowire with O/N/O (Oxide/Nitride/Oxide) dielectrics is ...
Kang, Jinfeng, Yijiao Wang, Gang Du, Yang, Yunxiang, Wang, Yijiao, Qin, Jieyu, Du, Gang, Yunxiang Yang, Liu, Xiaoyan, Jieyu Qin, Xiaoyan Liu, Jinfeng Kang   +11 more
core   +1 more source

Optimal Energetic-Trap Distribution of Nano-Scaled Charge Trap Nitride for Wider V_th Window in 3D NAND Flash Using a Machine-Learning Method. [PDF]

Nanomaterials (Basel), 2022
Nam K, Park C, Yoon JS, Yun H, Jang H, Cho K, Kang HJ, Park MS, Sim J, Choi HC, Baek RH.   +10 more
europepmc   +1 more source