Results 21 to 30 of about 26,595 (187)
Advanced Intelligent Systems, 2023 Herein, the impact of cross‐temperature on 3D NAND flash memory is modeled by considering adjacent cells using machine learning. The cells comprising NAND flash memory exhibit diverse states and connectivity patterns.
Kyeongrae Cho +8 more
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Investigation of Re-Program Scheme in Charge Trap-Based 3D NAND Flash Memory
IEEE Journal of the Electron Devices Society, 2021 Early retention or initial threshold voltage shift (IVS) is one of the key reliability challenges in charge trapping memory (CTM) based 3D NAND flash. Re-program scheme was introduced in quad-level-cell (QLC) NAND (Shibata et al., 2007, Lee et al., 2018,
Ting Cheng +13 more
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IEEE Access, 2023 To achieve high density, the spacer length of three dimensional (3D) NAND device has been scaled down. When the program/erase cycle repeats, problems such as electrons accumulation in the inter-cell region are occurred. To solve this problem, a method of
Yun-Jae Oh +4 more
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Self-Learning Hot Data Prediction: Where Echo State Network Meets NAND Flash Memories [PDF]
, 2020 © 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new ...
Ai, Jiaqiu +4 more
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Metrology Challenges in 3D NAND Flash Technical Development and Manufacturing
Journal of Microelectronic Manufacturing, 2020 3D NAND technical development and manufacturing face many challenges to scale down their devices, and metrology stands out as much more difficult at each turn. Unlike planar NAND, 3D NAND has a three-dimensional vertical structure with high-aspect ratio.
Wei Zhang +4 more
doaj +1 more source
Hydrogen Source and Diffusion Path for Poly-Si Channel Passivation in Xtacking 3D NAND Flash Memory
IEEE Journal of the Electron Devices Society, 2020 Poly-Si channels need well passivated by using hydrogen passivation process in 3D NAND flash memories for better poly-Si quality with low trap density.
Xinshuai Shen +7 more
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Impact of Cycling Induced Intercell Trapped Charge on Retention Charge Loss in 3-D NAND Flash Memory
IEEE Journal of the Electron Devices Society, 2020 As the 3D NAND technology developing toward more and more stack layers, it is essential to shrink the gate length (Lg) and inter-gate space (Ls). However, one of key concerns of scaling Lg/Ls 3D NAND flash is post-cycling data retention characteristics ...
Xinlei Jia +11 more
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A Novel Program Suspend Scheme for Improving the Reliability of 3D NAND Flash Memory
IEEE Journal of the Electron Devices Society, 2022 Experimental results indicate that the conventional program suspend scheme in 3D NAND flash memory chip can generate unexpected additional read fail bits and reduce the reliability of 3D NAND flash memory. These extra read fail bits are observed when the
Zhichao Du +11 more
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Additively manufacturable micro-mechanical logic gates. [PDF]
, 2019 Early examples of computers were almost exclusively based on mechanical devices. Although electronic computers became dominant in the past 60 years, recent advancements in three-dimensional micro-additive manufacturing technology provide new fabrication ...
Chizari, Samira +6 more
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Forensic Analysis of the Nintendo 3DS NAND
Digital Investigation, 2019 Abstract Games consoles present a particular challenge to the forensics investigator due to the nature of the hardware and the inaccessibility of the file system. Many protection measures are put in place to make it deliberately difficult to access raw data in order to protect intellectual property, enhance digital rights management of software and ...
Gus Pessolano +3 more
openaire +2 more sources