Results 21 to 30 of about 2,082 (171)

Investigation of Re-Program Scheme in Charge Trap-Based 3D NAND Flash Memory

IEEE Journal of the Electron Devices Society, 2021
Early retention or initial threshold voltage shift (IVS) is one of the key reliability challenges in charge trapping memory (CTM) based 3D NAND flash. Re-program scheme was introduced in quad-level-cell (QLC) NAND (Shibata et al., 2007, Lee et al., 2018,
Ting Cheng, Jianquan Jia, Lei Jin, Xinlei Jia, Shiyu Xia, Jianwei Lu, Kaiwei Li, Zhe Luo, Da Li, Hongtao Liu, Qiguang Wang, An Zhang, Daohong Yang, Zongliang Huo   +13 more
doaj   +1 more source

3D NAND Flash Memory Cell Current and Interference Characteristics Improvement With Multiple Dielectric Spacer

IEEE Access, 2023
To achieve high density, the spacer length of three dimensional (3D) NAND device has been scaled down. When the program/erase cycle repeats, problems such as electrons accumulation in the inter-cell region are occurred. To solve this problem, a method of
Yun-Jae Oh, Inyoung Lee, Yunejae Suh, Daewoong Kang, Il Hwan Cho   +4 more
doaj   +1 more source

Integration of Reconfigurable p-Bit and 1R Crossbar Array for Memristive Probabilistic Computing. [PDF]

Adv Sci (Weinh)
A memristive probabilistic computing system is demonstrated by integrating stochastic p‐bits based on volatile memristors with a 1R crossbar array encoding interaction weights. The system performs weighted‐sum operations across the array and updates p‐bits iteratively.
Soh K, Kim JE, Chun SY, Hwang SI, Kim BS, Lee YJ, Jang HW, Yoon JH.   +7 more
europepmc   +2 more sources

Metrology Challenges in 3D NAND Flash Technical Development and Manufacturing

Journal of Microelectronic Manufacturing, 2020
3D NAND technical development and manufacturing face many challenges to scale down their devices, and metrology stands out as much more difficult at each turn. Unlike planar NAND, 3D NAND has a three-dimensional vertical structure with high-aspect ratio.
Wei Zhang, Jun Xu, Sicong Wang, Yi Zhou, Jian Mi   +4 more
doaj   +1 more source

Hydrogen Source and Diffusion Path for Poly-Si Channel Passivation in Xtacking 3D NAND Flash Memory

IEEE Journal of the Electron Devices Society, 2020
Poly-Si channels need well passivated by using hydrogen passivation process in 3D NAND flash memories for better poly-Si quality with low trap density.
Xinshuai Shen, Zhiliang Xia, Tao Yang, Lei Liu, Jinwen Dong, Wenxi Zhou, Chunlong Li, Zongliang Huo   +7 more
doaj   +1 more source

Impact of Cycling Induced Intercell Trapped Charge on Retention Charge Loss in 3-D NAND Flash Memory

IEEE Journal of the Electron Devices Society, 2020
As the 3D NAND technology developing toward more and more stack layers, it is essential to shrink the gate length (Lg) and inter-gate space (Ls). However, one of key concerns of scaling Lg/Ls 3D NAND flash is post-cycling data retention characteristics ...
Xinlei Jia, Lei Jin, Wei Hou, Zhiyu Wang, Songmin Jiang, Kaiwei Li, Dejia Huang, Hongtao Liu, Wenzhe Wei, Jianwei Lu, An Zhang, Zongliang Huo   +11 more
doaj   +1 more source

A Novel Program Suspend Scheme for Improving the Reliability of 3D NAND Flash Memory

IEEE Journal of the Electron Devices Society, 2022
Experimental results indicate that the conventional program suspend scheme in 3D NAND flash memory chip can generate unexpected additional read fail bits and reduce the reliability of 3D NAND flash memory. These extra read fail bits are observed when the
Zhichao Du, Zhipeng Dong, Kaikai You, Xinlei Jia, Ye Tian, Yu Wang, Zhaochun Yang, Xiang Fu, Fei Liu, Qi Wang, Lei Jin, Zongliang Huo   +11 more
doaj   +1 more source

Forensic Analysis of the Nintendo 3DS NAND

Digital Investigation, 2019
Abstract Games consoles present a particular challenge to the forensics investigator due to the nature of the hardware and the inaccessibility of the file system. Many protection measures are put in place to make it deliberately difficult to access raw data in order to protect intellectual property, enhance digital rights management of software and ...
Gus Pessolano, Huw Read, Iain Sutherland, Konstantinos Xynos   +3 more
openaire   +3 more sources

Analytical Modeling of Threshold Voltage and Subthreshold Slope for 3-D NAND Flash Memory With a Non-Uniform Doping Profile

IEEE Journal of the Electron Devices Society, 2023
The emergence of data-driven technologies including Internet of Things (IoT), artificial intelligence (AI), and cloud computing has led to a surge in data generation and mining.
Amit Kumar, Shubham Sahay
doaj   +1 more source

Wafer-Scale 3D Integration for High-Density Multi-Valued Neuromorphic Logic. [PDF]

Adv Sci (Weinh)
Wafer‐scale 3D vertically integrated multi‐valued logic (MVL) circuits are realized by monolithically integrating a Te/IGZO heterojunction FET with an engineered Te pull‐up FET. Heterointerface‐mediated transport and optimized current matching enable stable ternary operation, while vertical stacking reduces circuit footprint and interconnect complexity,
Kim CH, Kim MS, Rhim JB, Kim TI, Kwon HI, Park IJ.   +5 more
europepmc   +2 more sources