Results 61 to 70 of about 26,595 (187)
Robust and Compatible Ferroelectric Memories with Polycrystalline TiO2 Channel for 3D Integration
Robust and monolithic 3D compatible ferroelectric memories are realized using the polycrystalline TiO2 channel‐based FeFET. The review covers physical mechanisms of the TiO2 channel FeFET, quantitative benchmarking, and advanced planar/vertical architectures for monolithic 3D integration based on HfO2‐TiO2 gate stack, offering a roadmap for reliable ...
Xujin Song +10 more
wiley +1 more source
Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho +6 more
wiley +1 more source
Analysis of High-Temperature Data Retention in 3D Floating-Gate nand Flash Memory Arrays
In this paper, we present a detailed experimental investigation of high-temperature data retention in 3D floating-gate NAND Flash memory arrays. Data reveal that charge detrapping from the cell tunnel oxide and depassivation of traps in the string ...
Gerardo Malavena +4 more
doaj +1 more source
Rethinking Split Manufacturing: An Information-Theoretic Approach with Secure Layout Techniques
Split manufacturing is a promising technique to defend against fab-based malicious activities such as IP piracy, overbuilding, and insertion of hardware Trojans. However, a network flow-based proximity attack, proposed by Wang et al.
Ashraf, Mohammed +5 more
core +1 more source
Silicon Nitride Resistive Memories
Amorphous SiNx is an attractive resistance switching material for ReRAM applications due to its physicochemical properties, such as humidity resistance, low oxygen diffusivity, and is used as a metal diffusion blocker. By modifying the ratio between N and Si atoms, the microstructure of the SiNx is affected, rendering it possible to change the ...
Alexandros‐Eleftherios Mavropoulis +7 more
wiley +1 more source
Physics‐Based Compact Modeling of Advanced 3D Nanoscale Vertical NAND Flash Memory
For advanced 3D NAND flash memory, a unified compact model for SPICE is proposed that spans from the intrinsic unit cell to the full string and captures the electrostatic coupling with adjacent inhibit strings. It can successfully predict read behavior, program/erase dynamics, and interactions between neighboring cells, reflecting array‐level behavior ...
Ilho Myeong, Seonho Shin, Ickhyun Song
wiley +1 more source
A Behavioral Compact Model of 3D NAND Flash Memory
We present a behavioral compact model of 3D NAND flash memory for integrated circuits and system-level applications. This model is easy to implement, computationally efficient, fast, accurate and effectively accounts for the different parasitic capacitance coupling effects applicable to the 3D geometry of the vertical channel Macaroni body charge-trap ...
Shubham Sahay, Dmitri B. Strukov
openaire +2 more sources
Hardware‐Based On‐Chip Learning Using a Ferroelectric AND‐Type Array With Random Synaptic Weights
This work demonstrates an energy‐efficient on‐chip learning system using an Metal‐Ferroelectric‐Insulator‐Semiconductor FeAND synaptic array. By employing a feedback alignment scheme with a separate backward array using fixed random weights, the system overcomes directional limitations of AND‐type arrays and achieves robust, low‐power learning suitable
Minsuk Song +8 more
wiley +1 more source
Nonvolatile memory with molecule-engineered tunneling barriers
We report a novel field-sensitive tunneling barrier by embedding C60 in SiO2 for nonvolatile memory applications. C60 is a better choice than ultra-small nanocrystals due to its monodispersion.
Baik S. J. +10 more
core +1 more source
This study investigates the impact of oxide/nitride (ON) pitch scaling on the memory performance of 3D NAND flash memory. We aim to enhance 3D NAND flash memory by systematically reducing the spacer length (Ls) and gate length (Lg) to achieve improved ...
Hee Young Bae +2 more
doaj +1 more source

