Results 21 to 30 of about 5,102 (147)
3D NAND flash memory based on junction-less a-Si:H channel with high on/off current ratio
AIP Advances, 2022 As the key hardware unit of computing in memory, 3D NAND flash memory has been the focus of the artificial intelligence (AI) era due to its high efficiency in processing massive and diverse data, which is superior to the conventional von-Neumann ...
Xinyue Yu +7 more
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Impact of Stacking-Up and Scaling-Down Bit Cells in 3D NAND on Their Threshold Voltages
Micromachines, 2022 Over the past few decades, NAND flash memory has advanced with exponentially-increasing bit growth. As bit cells in 3D NAND flash memory are stacked up and scaled down together, some potential challenges should be investigated.
Dongwoo Lee, Changhwan Shin
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Impact of Cycling Induced Intercell Trapped Charge on Retention Charge Loss in 3-D NAND Flash Memory
IEEE Journal of the Electron Devices Society, 2020 As the 3D NAND technology developing toward more and more stack layers, it is essential to shrink the gate length (Lg) and inter-gate space (Ls). However, one of key concerns of scaling Lg/Ls 3D NAND flash is post-cycling data retention characteristics ...
Xinlei Jia +11 more
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IEEE Journal of the Electron Devices Society, 2021 Reading data at a temperature which different from writing can cause a large number of failed bits in 3D NAND Flash memory. In this work, the threshold voltage (Vth) temperature effect of 3D NAND flash memory cell was investigated and a method was ...
Dan Wu +4 more
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Memories - Materials, Devices, Circuits and Systems, 2023 In this paper, we propose a gate-all-around with back-gate (GAAB) 3D NAND flash memory structure for high performance and reliability. First, in the selected string, we confirmed that the proposed structure can improve program performance using negative ...
Jae-Min Sim +6 more
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3D-NAND flash memory based neuromorphic computing
Acta Physica Sinica, 2022 A neuromorphic chip is an emerging AI chip. The neuromorphic chip is based on non-Von Neumann architecture, and it simulates the structure and working principle of the human brain. Compared with non-Von Neumann architecture AI chips, the neuromorphic chips have significant improvement of efficiency and energy consumption advantages.
Yang-Yang Chen +3 more
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IEEE Journal of the Electron Devices Society, 2021 For triple-level or quad-level 3D NAND flash memory, narrowing the Vth distribution of each state without influencing page program performance is one of the challenges.
Zhichao Du +6 more
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Optimization and evaluation of variability in the programming window of a flash cell with molecular metal-oxide storage [PDF]
, 2014 We report a modeling study of a conceptual nonvolatile memory cell based on inorganic molecular metal-oxide clusters as a storage media embedded in the gate dielectric of a MOSFET.
Asenov, Asen +5 more
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Electronics Letters, 2022 This letter presents an efficient built‐in error detection methodology for 3D NAND flash memories, in which fast page‐oriented data comparison and column parallel error detection are firstly proposed.
HM. Cao +5 more
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Investigation of Re-Program Scheme in Charge Trap-Based 3D NAND Flash Memory
IEEE Journal of the Electron Devices Society, 2021 Early retention or initial threshold voltage shift (IVS) is one of the key reliability challenges in charge trapping memory (CTM) based 3D NAND flash. Re-program scheme was introduced in quad-level-cell (QLC) NAND (Shibata et al., 2007, Lee et al., 2018,
Ting Cheng +13 more
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