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Investigating Floating-Gate Topology Influence on van der Waals Memory Performance. [PDF]

open access: yesNanomaterials (Basel)
Zheng H   +6 more
europepmc   +1 more source

3D Charge Trap NAND Flash Memories

ECS Transactions, 2016
This chapter starts off with 2 vertical channel architectures named BiCS (Bit Cost Scalable) and P-BiCS (Pipe-Shaped BiCS), respectively. BiCS was proposed for the first time by Toshiba in 2007, and another version called P-BiCS was presented in 2009 to improve retention, source selector performances and source line resistance.
Luca Crippa, Rino Micheloni
openaire   +2 more sources

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