Results 31 to 40 of about 4,160 (185)
Reliable and energy-efficient 3D NAND flash storage system design using run-time device and system interaction [PDF]
, 2023 NAND Flash memory is a non-volatile solid-state data storage technology widely used in electronic devices such as smartphones, tablets, laptops, digital cameras, USB drives, solid-state drives (SSDs), autonomous vehicles, space applications, and data ...
Raquibuzzaman, Md
core +1 more source
Analysis of HBM Failure in 3D NAND Flash Memory
Electronics, 2022 Electrostatic discharge (ESD) events are the main factors impacting the reliability of NAND Flash memory. The behavior of human body model (HBM) failure and the corresponding physical mechanism of 3D NAND Flash memory are investigated in this paper. A catastrophic burn-out failure during HBM zapping is first presented. Analysis shows that NMOS fingers’
Biruo Song +6 more
openaire +1 more source
Memories - Materials, Devices, Circuits and Systems, 2023 In this paper, we propose a gate-all-around with back-gate (GAAB) 3D NAND flash memory structure for high performance and reliability. First, in the selected string, we confirmed that the proposed structure can improve program performance using negative ...
Jae-Min Sim +6 more
doaj +1 more source
Balancing Page Endurance Variation Between Layers to Extend 3D NAND Flash Memory Lifetime. [PDF]
Micromachines (Basel)With vertical stacking, 3D NAND’s flash memory can achieve continuous capacity growth. However, the endurance variation between the stacked layers becomes more and more significant due to process variation, which will lead to the underutilization of many pages and seriously affect the lifetime of 3D NAND’s flash memory.
Wang J, Fan Y, Du Y, Huang S, Wan Y.
europepmc +4 more sources
Impact of Stacking-Up and Scaling-Down Bit Cells in 3D NAND on Their Threshold Voltages
Micromachines, 2022 Over the past few decades, NAND flash memory has advanced with exponentially-increasing bit growth. As bit cells in 3D NAND flash memory are stacked up and scaled down together, some potential challenges should be investigated.
Dongwoo Lee, Changhwan Shin
doaj +1 more source
Charge Loss Induced by Defects of Transition Layer in Charge-Trap 3D NAND Flash Memory
IEEE Access, 2021 In charge-trap (CT) three-dimensional (3D) NAND flash memory, the transition layer between Si3N4 CT layer and SiO2 tunneling layer is inevitable, and the defects in the transition layer are expected to cause both lateral and vertical charge loss.
Fei Wang +3 more
doaj +1 more source
Analysis of High-Temperature Data Retention in 3D Floating-Gate nand Flash Memory Arrays
IEEE Journal of the Electron Devices Society, 2023 In this paper, we present a detailed experimental investigation of high-temperature data retention in 3D floating-gate NAND Flash memory arrays. Data reveal that charge detrapping from the cell tunnel oxide and depassivation of traps in the string ...
Gerardo Malavena +4 more
doaj +1 more source
IEEE Journal of the Electron Devices Society, 2021 For triple-level or quad-level 3D NAND flash memory, narrowing the Vth distribution of each state without influencing page program performance is one of the challenges.
Zhichao Du +6 more
doaj +1 more source
Optimization and evaluation of variability in the programming window of a flash cell with molecular metal-oxide storage [PDF]
, 2014 We report a modeling study of a conceptual nonvolatile memory cell based on inorganic molecular metal-oxide clusters as a storage media embedded in the gate dielectric of a MOSFET.
Asenov, Asen +5 more
core +3 more sources
Investigation of Re-Program Scheme in Charge Trap-Based 3D NAND Flash Memory
IEEE Journal of the Electron Devices Society, 2021 Early retention or initial threshold voltage shift (IVS) is one of the key reliability challenges in charge trapping memory (CTM) based 3D NAND flash. Re-program scheme was introduced in quad-level-cell (QLC) NAND (Shibata et al., 2007, Lee et al., 2018,
Ting Cheng +13 more
doaj +1 more source