Results 41 to 50 of about 4,160 (185)

uFLIP-OC: Understanding Flash I/O Patterns on Open-Channel Solid State Drives [PDF]

open access: yes, 2017
International audienceSolid-State Drives (SSDs) have gained acceptance by providing the same block device abstraction as magnetic hard drives, at the cost of suboptimal resource utilisation and unpredictable performance.
Bjørling Matias   +5 more
core   +3 more sources

Impact of Cycling Induced Intercell Trapped Charge on Retention Charge Loss in 3-D NAND Flash Memory

open access: yesIEEE Journal of the Electron Devices Society, 2020
As the 3D NAND technology developing toward more and more stack layers, it is essential to shrink the gate length (Lg) and inter-gate space (Ls). However, one of key concerns of scaling Lg/Ls 3D NAND flash is post-cycling data retention characteristics ...
Xinlei Jia   +11 more
doaj   +1 more source

Systematic Analysis of Spacer and Gate Length Scaling on Memory Characteristics in 3D NAND Flash Memory

open access: yesApplied Sciences
This study investigates the impact of oxide/nitride (ON) pitch scaling on the memory performance of 3D NAND flash memory. We aim to enhance 3D NAND flash memory by systematically reducing the spacer length (Ls) and gate length (Lg) to achieve improved ...
Hee Young Bae   +2 more
doaj   +1 more source

Coding scheme for 3D vertical flash memory

open access: yes, 2015
Recently introduced 3D vertical flash memory is expected to be a disruptive technology since it overcomes scaling challenges of conventional 2D planar flash memory by stacking up cells in the vertical direction.
Bandic, Zvonimir   +4 more
core   +1 more source

3D NAND Flash Memory Cell Current and Interference Characteristics Improvement With Multiple Dielectric Spacer

open access: yesIEEE Access, 2023
To achieve high density, the spacer length of three dimensional (3D) NAND device has been scaled down. When the program/erase cycle repeats, problems such as electrons accumulation in the inter-cell region are occurred. To solve this problem, a method of
Yun-Jae Oh   +4 more
doaj   +1 more source

DESTINY: A Comprehensive Tool with 3D and Multi-Level Cell Memory Modeling Capability [PDF]

open access: yes, 2017
To enable the design of large capacity memory structures, novel memory technologies such as non-volatile memory (NVM) and novel fabrication approaches, e.g., 3D stacking and multi-level cell (MLC) design have been explored.
Mittal, Sparsh   +2 more
core   +3 more sources

Nonvolatile memory with molecule-engineered tunneling barriers

open access: yes, 2008
We report a novel field-sensitive tunneling barrier by embedding C60 in SiO2 for nonvolatile memory applications. C60 is a better choice than ultra-small nanocrystals due to its monodispersion.
Baik S. J.   +10 more
core   +1 more source

Spectrally Tunable 2D Material‐Based Infrared Photodetectors for Intelligent Optoelectronics

open access: yesAdvanced Functional Materials, EarlyView.
Intelligent optoelectronics through spectral engineering of 2D material‐based infrared photodetectors. Abstract The evolution of intelligent optoelectronic systems is driven by artificial intelligence (AI). However, their practical realization hinges on the ability to dynamically capture and process optical signals across a broad infrared (IR) spectrum.
Junheon Ha   +18 more
wiley   +1 more source

Physical and Electrical Analysis of Poly-Si Channel Effect on SONOS Flash Memory

open access: yesMicromachines, 2021
In this study, polycrystalline silicon (poly-Si) is applied to silicon-oxide-nitride-oxide-silicon (SONOS) flash memory as a channel material and the physical and electrical characteristics are analyzed.
Jun-Kyo Jeong   +5 more
doaj   +1 more source

Recent Progress and Opportunities in Oxide Semiconductor Devices for In‐Memory and Neuromorphic Computing

open access: yesAdvanced Electronic Materials, EarlyView.
This review surveys oxide‐semiconductor devices for in‐memory and neuromorphic computing, highlighting recent progress and remaining challenges in charge‐trap, ferroelectric, and two‐transistor devices. Oxide semiconductors, featuring ultra‐low leakage, low‐temperature processing, and back‐end‐of‐line compatibility, are explored for analog in‐memory ...
Suwon Seong   +4 more
wiley   +1 more source

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