Results 81 to 90 of about 4,160 (185)

Neuromorphic Computing with Memcapacitors: Advancements, Challenges, and Future Directions

Advanced Electronic Materials, Volume 11, Issue 18, November 4, 2025.
Neuromorphic computing reduces energy costs by integrating memory and processing in event‐driven architectures, achieving energy usage as low as 10–30 pJ per operation for memcapacitor‐based synapses. Memcapacitors are reviewed as strong contenders for neuromorphic computing, enhancing AI acceleration through charge‐based computations, high resistance,
Nada AbuHamra, Muhammad Umair Khan, Eman Hassan, Mahmoud Al Qutayri, Baker Mohammad   +4 more
wiley   +1 more source

An Improved Dimensional Measurement Method of Staircase Patterns With Higher Precision in 3D NAND

IEEE Access, 2020
3D NAND is a great architectural innovation in the field of flash memory. The staircase for control gate is a unique and important process in the manufacturing of 3D NAND.
Peizhen Hong, Zhiguo Zhao, Jun Luo, Zhiliang Xia, Xiaojing Su, Libin Zhang, Chunlong Li, Zongliang Huo   +7 more
doaj   +1 more source

Investigation of Retention Noise for 3-D TLC NAND Flash Memory

IEEE Journal of the Electron Devices Society, 2019
In this paper, the retention noise [electron emission statistics (EES)] after program operation of 3-D triple-level program cell (TLC) NAND flash memory is investigated.
Kunliang Wang, Gang Du, Zhiyuan Lun, Xiaoyan Liu   +3 more
doaj   +1 more source

Heavy Ion and Proton-Induced Single Event Upset Characteristics of a 3D NAND Flash Memory [PDF]

We evaluated the effects of heavy ion and proton irradiation for a 3D NAND flash. The 3D NAND showed similar single-event upset (SEU) sensitivity to a planar NAND of identical density in the multiple-cell level (MLC) storage mode.
Chen, Dakai, Kim, Hak, Label, Kenneth, Ladbury, Raymond, Phan, Anthony, Seidleck, Christina, Wilcox, Edward   +6 more
core   +1 more source

A Novel Program Scheme for Z-Interference Improvement in 3D NAND Flash Memory. [PDF]

Micromachines (Basel), 2023
Jia J, Jin L, Jia X, You K.
europepmc   +1 more source

Investigation of Erase Cycling Induced Joint Dummy Cell Disturbance in Dual-Deck 3D NAND Flash Memory. [PDF]

Micromachines (Basel), 2023
You K, Jin L, Jia J, Huo Z.
europepmc   +1 more source

White Light Interference Solution for Novel 3D NAND VIA Dishing Metrology

Journal of Microelectronic Manufacturing, 2019
In traditional 3D NAND design, peripheral circuit accounts for 20-30% of the chip real-estate, which reduces the memory density of flash memory. As 3D NAND technology stacks to 128 layers or higher, peripheral circuits may account for more than 50% of ...
Xiaoye Ding, Sicong Wang, Yi Zhou, Yanzhong Ma, Le Yang, Chi Chen   +5 more
doaj   +1 more source

Optimizing Cell Structure to Improve Cell Characteristics in IGZO Channel-Based 3D NAND Flash With p-Type Gate

IEEE Access
For the first time, a novel IGZO channel-based 3D NAND Flash structure with an embedded p-type poly-Si injection layer is proposed, using integrated structural, material, and operational modifications to address the limitations of the conventional IGZO ...
Sungho Park, Youngho Jung, Daewoong Kang
doaj   +1 more source

RBER-Aware Lifetime Prediction Scheme for 3D-TLC NAND Flash Memory

IEEE Access, 2019
NAND flash memory is widely used in various computing systems. However, flash blocks can sustain only a limited number of program/erase (P/E) cycles, which are referred to as the endurance.
Ruixiang Ma, Fei Wu, Meng Zhang, Zhonghai Lu, Jiguang Wan, Changsheng Xie   +5 more
doaj   +1 more source

Boosting the Performance of 3D Charge Trap NAND Flash with Asymmetric Feature Process Size Characteristic [PDF]

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Chen, Shuo Han
core