Results 31 to 40 of about 535 (152)

Design of novel hybrid - digitally controlled oscillator for ADPLL

open access: yesMemories - Materials, Devices, Circuits and Systems, 2023
Digitally Controlled Oscillators (DCOs) are an integral part of All Digital Phase Locked Loops (ADPLLs). It is used to generate output frequency corresponding to the applied digital input.
Mohd Ziauddin Jahangir   +1 more
doaj   +1 more source

Master‐Slave Topologies with Phase‐Locked Loops

open access: yesWireless Communications and Mobile Computing, Volume 2020, Issue 1, 2020., 2020
Since phase‐locked loops (PLLs) were conceived by Bellescize in 1932, their presence has become almost mandatory in any telecommunication device or network, being the essential element to recover frequency and phase information. As the technology developed, PLL appeared in several applications, such as, dense communication networks, smart grids ...
José Roberto C. Piqueira   +1 more
wiley   +1 more source

A Low Supply Voltage All-Digital Phase-Locked Loop With a Bootstrapped and Forward Interpolation Digitally Controlled Oscillator

open access: yesIEEE Access, 2021
An all-digital phase-locked loop (ADPLL) with a multiphase digitally controlled oscillator (DCO) incorporating the bootstrapped and interpolated schemes is proposed in this paper.
Jen-Chieh Liu, Yu-Ping Li
doaj   +1 more source

A Scalable DCO Design for Portable ADPLL Designs [PDF]

open access: yes2005 IEEE International Symposium on Circuits and Systems, 2005
A novel digital controlled oscillator (DCO) design methodology is presented in this paper. The new design methodology includes a scalable DCO architecture and the developed design flow. With precise analysis in early stage, the design effort of DCO can be reduced significantly.
Chia-Tsun Wu   +3 more
openaire   +2 more sources

A Novel Fast-Locking ADPLL Based on Bisection Method

open access: yes, 2021
Based on the idea of bisection method, a new structure of All-Digital Phased-Locked Loop (ADPLL) with fast-locking is proposed. The structure and locking method are different from the traditional ADPLLs.
Mingcheng Zhu   +2 more
core   +1 more source

A Novel Architecture of ADPLL Using Cordic Algorithm for Low-Frequency Application

open access: yes, 2023
All Digital Phase Locked Loop (ADPLL) has many applications in digital communication. It is difficult for low-frequency applications to achieve the lock state quickly.
Velamarthi Spandana,, et al.
core   +1 more source

Digital controlled oscillator (DCO) for all digital phase-locked loop (ADPLL) – a review [PDF]

open access: yes, 2019
Digital controlled oscillator (DCO) is becoming an attractive replacement over the voltage control oscillator (VCO) with the advances of digital intensive research on all-digital phase locked-loop (ADPLL) in complementary metal-oxide semiconductor (CMOS)
Reaz, Mamun Ibne   +10 more
core   +1 more source

A 3.22–5.45 GHz and 199 dBc/Hz FoMT CMOS Complementary Class‐C DCO

open access: yesWireless Communications and Mobile Computing, Volume 2018, Issue 1, 2018., 2018
This paper implements a complementary Class‐C digitally controlled oscillator (DCO) with differential transistor pairs. The transistors are dynamically biased by feedback loops separately benefiting the robust oscillation start‐up with low power consumption.
Lei Ma   +5 more
wiley   +1 more source

A Low Power All-Digital PLL With −40dBc In-Band Fractional Spur Suppression for NB-IoT Applications

open access: yesIEEE Access, 2019
This paper proposes a low-power fractional-N all-digital PLL (ADPLL) for the narrow-band Internet-of-Things applications. Multi-step lock controlling and oscillator tuning word coarse prediction algorithms help to accelerate the locking process to less ...
Na Yan   +6 more
doaj   +1 more source

All-Digital Phase Locked Loop (ADPLL) Topologies For RFID System Application: A Review

open access: yes, 2021
An all-digital phase locked loop (ADPLL)-based local oscillator (LO) of RF transceiver application such as radio-frequency identification (RFID) system has gained popularity by accessing the benefits in complementary metal-oxide semiconductor (CMOS ...
Ishak, S. N.   +3 more
core   +1 more source

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