Results 91 to 100 of about 723 (223)

Measurement and Analysis of Multistate Ferroelectric Transistors in 28 nm CMOS Process

IEEE Journal of the Electron Devices Society
Ferroelectric field-effect transistors (FeFETs) are strong candidates for synaptic devices in neuromorphic and in-memory computing due to their multi-level programmability, non-volatility, and complementary metal-oxide-semiconductor (CMOS) compatibility.
Sayma Nowshin Chowdhury, Alex L. Mazzoni, Xiaohang Zhang, Andreu L. Glasmann, Halid Mulaosmanovic, Stefan Dunkel, Gunda Beernink, Sven Beyer, Sina Najmaei, Sahil Shah   +9 more
doaj   +1 more source

Demonstration of versatile nonvolatile logic gates in 28nm HKMG FeFET technology

, 2021
Logic-in-memory circuits promise to overcome the von-Neumann bottleneck, which constitutes one of the limiting factors to data throughput and power consumption of electronic devices.
Mikolajick, T., Breyer, E. T., Slesazeck, S., Mulaosmanovic, H.   +3 more
core   +1 more source

Hardware‐Based On‐Chip Learning Using a Ferroelectric AND‐Type Array With Random Synaptic Weights

Advanced Intelligent Systems, EarlyView.
This work demonstrates an energy‐efficient on‐chip learning system using an Metal‐Ferroelectric‐Insulator‐Semiconductor FeAND synaptic array. By employing a feedback alignment scheme with a separate backward array using fixed random weights, the system overcomes directional limitations of AND‐type arrays and achieves robust, low‐power learning suitable
Minsuk Song, Changhyeon Han, Joonhyeok Choi, Jongwoo Lee, Hyun‐min Kim, Wongi Hong, Ujin Kim, Sung‐Tae Lee, Daewoong Kwon   +8 more
wiley   +1 more source

Plasma-Enhanced Atomic Layer Deposition-Based Ferroelectric Field-Effect Transistors

IEEE Journal of the Electron Devices Society
The use of the plasma-enhanced atomic layer deposition (ALD) technique for the deposition of HfO2-based ferroelectrics has received attention in recent years primarily due to wake-up free operation.
Chinsung Park, Prasanna Venkat Ravindran, Dipjyoti Das, Priyankka Gundlapudi Ravikumar, Chengyang Zhang, Nashrah Afroze, Lance Fernandes, Yu Hsin Kuo, Jae Hur, Hang Chen, Mengkun Tian, Winston Chern, Shimeng Yu, Asif Islam Khan   +13 more
doaj   +1 more source

A Neuromorphic Simulation Framework for Indium‐Gallium‐Zinc‐Oxide Charge‐Trap Synaptic Transistors: From Device Modeling to System Simulation

Advanced Intelligent Systems, EarlyView.
This work presents a comprehensive framework bridging device fabrication, modeling, and system‐level simulation for an indium‐gallium‐zinc‐oxide (IGZO) charge‐trap synaptic transistor‐based neuromorphic system. By developing a precise SPICE model derived from fabricated IGZO synaptic transistors, the study incorporates parasitic RC loads into array ...
Yumin Yun, Junhyeong Park, Sunyeol Bae, Chae‐Hwan Park, Dong Hyeon Lee, Soo‐Yeon Lee   +5 more
wiley   +1 more source

Exploiting Ferroelectric and Spintronic Dynamics for Neural Network Computation

Advanced Intelligent Systems, EarlyView.
Ferroelectric and spintronic devices, relying on the control of polarization and magnetization, offer intrinsically fast, durable, energy‐efficient, and low‐latency building blocks for analog in‐memory computing. The hysteretic dynamics of an order parameter are leveraged to provide nonvolatile, multistate memory and nonlinear switching. Brain‐inspired
Dashiell Harrison, Kevin Nadaud, Josquin Harrison, Guillaume F. Nataf, Laura Bégon‐Lours   +4 more
wiley   +1 more source

Low-Thermal-Budget Ferroelectric Field-Effect Transistors Based on CuInP2S6 and InZnO

, 2023
In this paper, we demonstrate low-thermal-budget ferroelectric field-effect transistors (FeFETs) based on two-dimensional ferroelectric CuInP2S6 (CIPS) and oxide semiconductor InZnO (IZO).
Lee, Kyusang, Zhu, Wenjuan, Zhao, Zijing, Rakheja, Shaloo, Park, Minseong, Bae, Byungjoon, Kang, Junzhe, Ryu, Hojoon   +7 more
core  

Device-Aware Test for Threshold Voltage Shifting in FeFET

2025 IEEE International Test Conference (ITC)
Ferroelectric Field-Effect Transistors (FeFETs) are promising candidates for non-volatile memory (NVM) technologies, especially in embedded systems and edge computing. However, due to their physical characteristics, FeFETs exhibit unique defects—such as Threshold Voltage Shifting (TVS) caused by trap charges in the oxide layer—that are not captured by ...
Wang, Changhao, Kolahimahmoudi, Nima, Bellarmino, Nicolo, Cantoro, Riccardo, Yuan, Sicong, Xun, Hanzhi, Chen, Danyang, Yin, Chujun, Taouil Mottaqiallah, Fieback, Moritz, Li, Xiuyan, Wang, Lin, Li, Chaobo, Hamdioui, Said   +13 more
openaire   +2 more sources

Multi-Level FeFET-Based CAM Address Decoder

2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC)
Address decoders are an integral part of random access memories. They are typically implemented using fast logic optimised for low latency. The latter, however, are difficult to test, while their repair is considered to be impossible. In this work we propose a highly scalable and testable address decoder solution, based on Content-Addressable Memories ...
Thomas Makryniotis, Georgi Gaydadjiev, Said Hamdioui, Mottaqiallah Taouil   +3 more
openaire   +2 more sources

Two‐Dimensional Layered Oxides and the Two‐Dimensionalization of Bulk Oxides for Post‐Moore Information Devices

Information &Functional Materials, EarlyView.
This review systematically summarizes two‐dimensional layered and nonlayered oxides, focusing on their synthesis, properties, and post‐Moore applications in transistors, gate dielectrics, optoelectronics, and ferroelectric/magnetic devices. It also discusses challenges including scalable growth and interface engineering, along with future industrial ...
Xinjie Hou, Yanchang Zhou, Yushan Zhu, Xiao Zhang, Ruiqing Cheng, Jun He   +5 more
wiley   +1 more source