Results 121 to 130 of about 723 (223)
This work presents, for the first time, an investigation of the impact of random phase distribution on ferroelectric (FE) tunnel field-effect transistors (FeTFETs).
Jiwon Park +5 more
doaj +1 more source
FeFET-Based MirrorBit Cell for High-Density NVM Storage
HfO2-based Ferroelectric field-effect transistor (FeFET) has become a center of attraction for non-volatile memory applications because of their low power, fast switching speed, high scalability, and CMOS compatibility. In this work, we show an n-channel FeFET-based Multibit memory, termed MirrorBit, which effectively doubles the chip density via ...
Paritosh Meihar +8 more
openaire +2 more sources
113116In this work we introduce reconfigurable multifinger ferroelectric field effect transistors (FeFETs) which were fabricated using 28 nm CMOS technology.
Raffel, Yannick +8 more
core +1 more source
The rapid advancement of AI‐enabled applications has resulted in an increasing need for energy‐efficient computing hardware. Logic‐in‐memory is a promising approach for processing the data stored in memory, wherein fast and efficient computations are ...
Jingjie Niu +8 more
doaj +1 more source
Advanced data-intensive computing models demand memory technologies that exceed conventional von Neumann architectures, requiring high-density and low-power capabilities. Among these emerging technologies, the ferroelectric field effect transistor (FEFET)
Park, Chinsung
core
Interface‐Engineered TiO2 Interlayer for Reliable Hafnia‐Based MFMIS FeFETs
We investigated a TiO2‐engineered interfacial strategy to enhance the stability and reliability of hafnia‐based ferroelectric field‐effect transistors (FeFETs) employing a metal‐ferroelectric‐metal‐insulator‐semiconductor (MFMIS) architecture.
Changhyeon Han +4 more
doaj +1 more source
Nanogate ferroelectric transistors with ultralow operation voltage of 0.6 V. [PDF]
Meng D +5 more
europepmc +1 more source
TiO<sub>2</sub> nanolayer-assisted top-interface engineering for disturbance-free FeFETs: a blueprint for future van der Waals memory. [PDF]
Kang H +11 more
europepmc +1 more source
Sub-2 nm Equivalent-Oxide-Thickness Ferroelectric Transistors for Cryogenic Memory and Computing. [PDF]
Das A +18 more
europepmc +1 more source
Towards Artificial Intelligence Hardware With 3D Integrated Ferroelectric Transistors. [PDF]
Seok H, Kim G, Son S, Choi H, Kim T.
europepmc +1 more source

