Results 71 to 80 of about 12,503,659 (299)
Photogating in Suspended InAs Nanowire Field Effect Transistors for Neuromorphic Applications
Suspended indium arsenide (InAs) nanowires offer a unique platform for studying surface‐driven transport phenomena due to their high surface‐to‐volume ratio and the absence of dielectric interfaces. In this work, we investigate the role of surface states
Aniello Pelella +8 more
doaj +1 more source
Wafer‐scale two‐dimensioanl In2Se3 oxidized into InOx on sodium‐embedded beta‐alumina enables multifunctional reconfigurable electronics. Sodium ions accumulate within distinct spatial distribution under drain‐controlle and gate‐controlled operation. Drain‐control operation gives controllability of ultraviolet‐driven optoelectronic synaptic conductance
Jinhong Min +13 more
wiley +1 more source
Exciton Binding Energy of Phosphorescent Emitter Molecules in Organic Light‐Emitting Diodes
Energy level alignment is key to efficient OLED design, yet determining LUMO energies remains challenging. A methodology based on field‐induced dissociation and kinetic Monte Carlo simulations is presented to extract LUMO energies of iridium‐based phosphorescent emitters from their exciton binding energy.
Hiroki Tomita +6 more
wiley +1 more source
A comparison of performance between double-gate and gate-all-around nanowire mosfet
Due to the rapid scaling of Complementary Metal-Oxide-Semiconductor (CMOS), the structure of the planar MOSFET approaches the scaling limits when the short channel effects (SCEs) become the main problem.
Hamid, Fatimah A. +4 more
core +1 more source
3D Printing Innovations in Polymeric Porous and Patterned Architecture
Polymeric foams occupy a unique structural space between dense solids and open networks, where engineered void fraction governs mechanical compliance, thermal resistance, and mass transport. Additive manufacturing now enables precise spatial control over cellular architecture, unlocking designer foam structures across applications spanning crash ...
Dhanush Patil +13 more
wiley +1 more source
Low Temperature HfO₂ Interface Engineering in Dual-Gate and Gate-All-Around MoS₂ Transistors
This paper introduces the deposition of seed layers using a soaking technique to deposit dielectric layers on transition metal dichalcogenides (TMDs). This method addresses the bottleneck caused by the lack of dangling bonds in two-dimensional materials,
Po-Heng Pao +3 more
doaj +1 more source
Sub-micron, Metal Gate, High-к Dielectric, Implant-free, Enhancement-mode III-V MOSFETs [PDF]
The performance of 300nm, 500nm and 1μm metal gate, implant free, enhancement mode III-V MOSFETs are reported. Devices are realised using a 10nm MBE grown Ga2O3/(GaxGd1-x)2O3 high-κ (κ=20) dielectric stack grown upon a δ-doped AlGaAs/InGaAs/AlGaAs ...
Moran, D.A.J. +23 more
core +1 more source
Electro‐Steric Ion Confinement in Polyelectrolyte Networks for Robust Nonvolatile Artificial Synapse
Polyelectrolyte stoichiometry governs ion transport and retention in electrolyte‐gated synaptic transistors. A PSS‐rich network creates electro‐steric ion confinement that suppresses ion back‐diffusion and stabilizes channel doping, enabling robust nonvolatile synaptic memory, linear weight updates, and low‐energy operation.
Donghwa Lee +9 more
wiley +1 more source
Impact of strain of sub-3 nm gate-all-around (GAA) CMOS transistors on the circuit performance is evaluated using a neural compact model. The model was trained using 3D technology computer-aided design (TCAD) device simulation data of GAA field-effect ...
Ji Hwan Lee +5 more
doaj +1 more source
A simulation study is made of floating-body effects (FBEs) in vertical MOSFETs due to depletion isolation as the pillar thickness is reduced from 200 to 10 nm.
Ashburn, Peter +5 more
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