Results 121 to 130 of about 4,456 (178)

Junctionless Silicon Nanowire Transistors without the Use of Impurity Doping. [PDF]

ACS Nano
Nagarajan S, König D, Ratschinski I, Galderisi G, Shams S, Mikolajick T, Hiller D, Trommer J.   +7 more
europepmc   +1 more source

Characteristics of nMOS/GAA (Gate-All-Around) transistors near threshold

Microelectronic Engineering, 1992
Simulations of, drain Current and intrinsic gate capacitances of nMOS/GAA transistors are presented and compared with experimental results. On the basis of the insight they give into the unique behaviour of these devices, new hypotheses have emerged and yielded an analytical model valid around the threshold voltage.
P. Francis, A. Terao, D. Flandre, F. Van de Wiele   +3 more
openaire   +2 more sources

Two-dimensional confinement effects in gate-all-around (GAA) MOSFETs

Solid-State Electronics, 1998
Two-dimensional electron confinement effects have been modeled and experimentally observed in silicon-on-insulator (SOI) gate-all-around (GAA) MOSFETs. Solving the Poisson and Schrodinger equations in a self-consistent manner provides the electron wave functions and the energy levels within the device channel.
X. Baie, J.P. Colinge
openaire   +2 more sources

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Design optimization of gate-all-around (GAA) MOSFETs

IEEE Nanotechnology Magazine, 2006
The design of gate-all-around (GAA) MOSFETs was optimized and compared with that of double-gate MOSFETs. We discussed the optimal ratio of the fin width to the gate length and investigated short-channel effects of GAA MOSFETs. Using three-dimensional simulations, we confirmed that short-channel effects were properly suppressed although the fin width ...
Jae Young Song, Woo Young Choi, Ju Hee Park   +2 more
exaly   +2 more sources

Effects of total-dose irradiation on gate-all-around (GAA) devices

IEEE Transactions on Nuclear Science, 1993
The response of gate-all-around (GAA) MOS transistors to dose irradiation is quite different from that observed on other types of silicon-on-insulator (SOI) MOSFETs. In regular SOI MOSFETs, edge leakage increases substantially faster than the main transistor leakage upon creation of oxide charges due to the irradiation.
J.-P. Colinge, A. Terao
openaire   +2 more sources

Realization of Gate-All-Around (GAA) SOI MOSFET Using Replacement Gate Mask

2007 IEEE Conference on Electron Devices and Solid-State Circuits, 2007
This paper describes a novel fabrication process of achieving the gate-all-around (GAA) MOSFET device using the replacement gate mask method. In this process, the masking step for the isotropic etch of the bottom gate was replaced by a replacement gate masking step together with a series of processes.
C M Ng
exaly   +2 more sources

Drain current model for a gate all around (GAA) p–n–p–n tunnel FET

Microelectronics Journal, 2013
Abstract A two dimensional drain current model has been proposed for a gate all around silicon p–n–p–n (pocket doped or tunnel source) tunnel field effect transistor (TFET) including the influence of drain voltage and source/drain depletion widths.
Rakhi Narang, Manoj Saxena, R S Gupta
exaly   +2 more sources

Impact of gate material engineering(GME) on analog/RF performance of nanowire Schottky-barrier gate all around (GAA) MOSFET for low power wireless applications: 3D T-CAD simulation

Microelectronics Journal, 2014
In this paper Gate Material Engineered (GME) Gate-Stack (GS) silicon nanowire Schottky-Barrier (SB) Gate All Around (GAA) MOSFET and Single Material Gate Stack Schottky-Barrier Source/Drain Gate All Around (SM-GS-SB-S/D GAA) structures are proposed for ...
Manoj Kumar, Subhasis Haldar, Mridula Gupta   +2 more
exaly   +2 more sources

AFM characterization for Gate-All-Around (GAA) devices

Metrology, Inspection, and Process Control for Microlithography XXXIV, 2020
As development of stacked Nanosheet Gate All-Around (GAA) transistor continues as the candidate technology for future nodes, several key process points remain difficult to characterize effectively. With the GAA device strategy, it is critical to have an inline solution that can provide a readout of physical dimensions that have an impact on the ...
Mary A. Breton, Jennifer Fullam, Lan Yu, Dexin Kong, Daniel Schmidt, Andrew Greene, Liying Jiang, Sean Hand, Jason Osborne   +8 more
openaire   +1 more source

Characteristics of GaN-Based Nanowire Gate-All-Around (GAA) Transistors

Journal of Nanoscience and Nanotechnology, 2020
We investigate the DC, C–V, and pulse performances in GaN-based nanowire gate-all-around (GAA) transistors with two kinds of geometry: one is AlGaN/GaN heterostructure with two dimensional electron gas (2DEG) channel and the other is only GaN layer without 2DEG channel.
Ki-Sik, Im, Mallem Siva Pratap, Reddy, Jinseok, Choi, Youngmin, Hwang, Jea-Seung, Roh, Sung Jin, An, Jung-Hee, Lee   +6 more
openaire   +2 more sources