Results 11 to 20 of about 18,442,309 (293)
A Novel Germanium-Around-Source Gate-All-Around Tunnelling Field-Effect Transistor for Low-Power Applications [PDF]
This paper presents a germanium-around-source gate-all-around tunnelling field-effect transistor (GAS GAA TFET). The electrical characteristics of the device were studied and compared with those of silicon gate-all-around and germanium-based-source gate ...
Ke Han +4 more
doaj +3 more sources
A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator [PDF]
Ultra-low power and high-performance logical devices have been the driving force for the continued scaling of complementary metal oxide semiconductor field effect transistors which greatly enable electronic devices such as smart phones to be energy ...
Yannan Zhang, Ke Han, and Jiawei Li
doaj +2 more sources
Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs [PDF]
A 16-nm-Lg p-type Gate-all-around (GAA) silicon nanowire (Si NW) metal oxide semiconductor field effect transistor (MOSFET) was fabricated based on the mainstream bulk fin field-effect transistor (FinFET) technology.
Jie Gu +16 more
doaj +2 more sources
An Overview of Hot Carrier Degradation on Gate-All-Around Nanosheet Transistors [PDF]
Gate-All-Around (GAA) Nanosheet (NS) transistors have been identified as the device architecture for 3 nm and beyond as they provide additional scaling benefits.
Huimei Zhou
doaj +2 more sources
As technology develops, the stacked nanosheet (NS) structure demonstrates promise for use in future technology nodes. This study demonstrated the excellent performance of stacked-NS channels with junctionless gate-all-around thin-film transistors and ...
Yu-Ru Lin +3 more
doaj +2 more sources
A comparison of performance between double-gate and gate-all-around nanowire MOSFET [PDF]
<span lang="EN-MY">Due to the rapid scaling of </span><span>Complementary Metal-Oxide-Semiconductor</span><span lang="EN-MY"> (CMOS), the structure of the planar MOSFET approaches the scaling limits when the short channel effects (SCEs) become the main problem.
Kosmani, Nor Fareza +2 more
openaire +3 more sources
Low Temperature HfO₂ Interface Engineering in Dual-Gate and Gate-All-Around MoS₂ Transistors
This paper introduces the deposition of seed layers using a soaking technique to deposit dielectric layers on transition metal dichalcogenides (TMDs). This method addresses the bottleneck caused by the lack of dangling bonds in two-dimensional materials,
Po-Heng Pao +3 more
doaj +2 more sources
Under several circumstances, a nanowire transistor with a square cross-section behaves as a circular. Taking the Gate-All-Around junctionless transistor as a primary example, we investigate the transition of the conductive region from square to circle ...
Georges Pananakakis +2 more
doaj +1 more source
In this article, sub-10 nm top width nanowire In0.53Ga0.47As gate-all-around (GAA) MOSFETs with improved subthreshold characteristics and reliability are demonstrated.
Hua-Lun Ko +7 more
doaj +1 more source
A Vertically Stacked Nanosheet Gate-All-Around FET for Biosensing Application
In this paper, a vertically stacked nanosheet gate-all-around field-effect transistor (GAA-NSFET) as a label-free biosensor has been proposed and investigated.
Cong Li +3 more
doaj +1 more source

