Results 21 to 30 of about 85,724 (295)
A Vertically Stacked Nanosheet Gate-All-Around FET for Biosensing Application
IEEE Access, 2021 In this paper, a vertically stacked nanosheet gate-all-around field-effect transistor (GAA-NSFET) as a label-free biosensor has been proposed and investigated.
Cong Li +3 more
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A Dual Core Source/Drain GAA FinFET
Tecnología en Marcha, 2023 The emergence of fin-shaped field effect transistors (FinFETs) was governed by the requirement of the VLSI industry to include more functionalities per unit chip area. Enhanced gate control in a FinFET due to a surrounding gate architecture built on the
Prachuryya Subash Das +5 more
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Narrow Sub-Fin Technique for Suppressing Parasitic-Channel Effect in Stacked Nanosheet Transistors
IEEE Journal of the Electron Devices Society, 2022 A new approach of narrowing sub-fin with little extra process cost for suppressing parasitic-channel-effect (PCE) on vertically-stacked horizontal gate-all-around (GAA) Si nanosheet field-effect-transistors (NS-FETs) is proposed.
Jie Gu +11 more
doaj +1 more source
IEEE Journal of the Electron Devices Society, 2021 This study investigates a device’s ability to boost its on-state current and subthreshold behavior using a ferroelectric field-effect transistor (FeFET) with an ultrathin sub-5-nm Hf1-xZrxO2 (HZO). A conventional field-effect transistor (FET) with
Shen-Yang Lee +4 more
doaj +1 more source
IEEE Journal of the Electron Devices Society, 2019 Present work demonstrates the vertically double stacked nanosheet (NS) p-channel polycrystalline silicon (poly-Si) junctionless field-effect transistors (JL-FET) with tri-gate, omega-gate, and gate all around (GAA) structure.
Meng-Ju Tsai +7 more
doaj +1 more source
IEEE Journal of the Electron Devices Society, 2021 For improving self-heating effects (SHEs) in gate-all-around metal-oxide-semiconductor field-effect transistors (GAA MOSFETs), hetero-gate-dielectric (HGD) is utilized. The HGD consists of hafnium dioxide (HfO2) and silicon dioxide (SiO2), which has high
Young Suh Song +5 more
doaj +1 more source
NEGF simulations of a junctionless Si gate-all-around nanowire transistor with discrete dopants [PDF]
, 2012 We have carried out 3D Non-Equilibrium Green Function simulations of ajunctionlessgate-all-around n-type silicon nanowiretransistor of 4.2 × 4.2 nm2 cross-section. We model the dopants in a fully atomistic way.
Brown, A. +10 more
core +1 more source
Sub‑5 nm Gate-All-Around InP Nanowire Transistors toward High-Performance Devices [PDF]
, 2023 The gate-all-around (GAA) nanowire (NW) field-effect transistor (FET) is a promising device architecture due to its superior gate controllability compared to that of the conventional FinFET architecture.
Ruge Quhe (1619785) +9 more
core +1 more source
Suspended InAsnanowire gate-all-around field-effect transistors [PDF]
, 2014 Gate-all-around field-effect transistors are realized with thin, single-crystalline, pure-phase InAs nanowires grown by molecular beam epitaxy. At room temperature, the transistors show a desired high on-state current I-on of similar to 10 mu A arid an ...
Shaoyun Huang +18 more
core +1 more source
Self-aligned silicidation of surround gate vertical MOSFETs for low cost RF applications [PDF]
, 2010 We report for the first time a CMOS-compatible silicidation technology for surround-gate vertical MOSFETs. The technology uses a double spacer comprising a polysilicon spacer for the surround gate and a nitride spacer for silicidation and is successfully
Tan, L. +16 more
core +1 more source