Results 81 to 90 of about 85,432 (295)
Exciton Binding Energy of Phosphorescent Emitter Molecules in Organic Light‐Emitting Diodes
Energy level alignment is key to efficient OLED design, yet determining LUMO energies remains challenging. A methodology based on field‐induced dissociation and kinetic Monte Carlo simulations is presented to extract LUMO energies of iridium‐based phosphorescent emitters from their exciton binding energy.
Hiroki Tomita +6 more
wiley +1 more source
Two-dimensional confinement effects in gate-all-around (GAA) MOSFETS
Two-dimensional electron confinement effects have been modeled and experimentally observed in silicon-on-insulator (SOI) gate-all-around (GAA) MOSFETs. Solving the Poisson and Schrodinger equations in a self-consistent manner provides the electron wave ...
X. Baie +3 more
core +1 more source
3D Printing Innovations in Polymeric Porous and Patterned Architecture
Polymeric foams occupy a unique structural space between dense solids and open networks, where engineered void fraction governs mechanical compliance, thermal resistance, and mass transport. Additive manufacturing now enables precise spatial control over cellular architecture, unlocking designer foam structures across applications spanning crash ...
Dhanush Patil +13 more
wiley +1 more source
A simulation study is made of floating-body effects (FBEs) in vertical MOSFETs due to depletion isolation as the pillar thickness is reduced from 200 to 10 nm.
Ashburn, Peter +5 more
core
Electro‐Steric Ion Confinement in Polyelectrolyte Networks for Robust Nonvolatile Artificial Synapse
Polyelectrolyte stoichiometry governs ion transport and retention in electrolyte‐gated synaptic transistors. A PSS‐rich network creates electro‐steric ion confinement that suppresses ion back‐diffusion and stabilizes channel doping, enabling robust nonvolatile synaptic memory, linear weight updates, and low‐energy operation.
Donghwa Lee +9 more
wiley +1 more source
Impact of strain of sub-3 nm gate-all-around (GAA) CMOS transistors on the circuit performance is evaluated using a neural compact model. The model was trained using 3D technology computer-aided design (TCAD) device simulation data of GAA field-effect ...
Ji Hwan Lee +5 more
doaj +1 more source
A simulation study is made of floating-body effects (FBEs) in vertical MOSFETs due to depletion isolation as the pillar thickness is reduced from 200 to 10 nm.
Ashburn, P. +5 more
core
Analytical subthreshold channel potential model of asymmetric gate underlap gate-all-around MOSFET
In this paper an analytic subthreshold potential model for undoped cylindrical gate-all-around (GAA) MOSFET with asymmetric gate underlap is developed.
Zhang, Lining +5 more
core +1 more source
Solution‐Processed Thin‐Film Transistors With Tunable Temporal Dynamics for Neuromorphic Computing
Solution‐processed CNT and CNT/P3HT ion‐gated transistors exhibit materials‐defined synaptic timescales: fast CNT devices for high‐frequency spiking and slow hybrid devices for temporal integration. Embedding these dynamics into coupled reservoir‐computing and spiking neural network simulations reveals that a Hybrid‐Reservoir / CNT‐SNN architecture ...
Kevin Schnittker +5 more
wiley +1 more source
Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions
In this work, we demonstrate a strained Si single nanowire tunnel field effect transistor (TFET) with gate-all-around (GAA) structure yielding Ion-current of 15 μA/μm at the supply voltage of Vdd = 0.5V with linear onset at low drain voltages.
Keyvan Narimani +4 more
doaj +1 more source

