Results 101 to 110 of about 4,033 (229)

Test algorithm and bist design for mram write disturbance fault [PDF]

open access: yes, 2012
[[abstract]]The write disturbance fault (WDF) model is a fault model specific to MRAM which implies that the data stored in the MRAM cells is changed due to excessive magnetic field during a Write operation.
Chen, Ching-Yi;Lo, Wan-Yu;Su, Chin-Lung;Wu, Cheng-Wen
core  

Novel CPU cache architecture based on two-dimensional MTJ device with ferromagnetic Fe3GeTe2

open access: yesAIP Advances
With the development of Artificial Intelligence (AI) in recent years, the fields of computer, biology, medicine, and aerospace have demanded higher requirements for the processing and storage of information.
Shaopu Han, Yanfeng Jiang
doaj   +1 more source

Optimization of the 3D multi-level SOT-MRAMs

open access: yesAIP Advances
With the development of electronic technology, semiconductor memory is gradually shifting toward smaller area with less power consumption. SOT-MRAM is one of the competitive substitutes for DRAM and SRAM due to its superior endurance and switching speed.
Hui Lin, Yanfeng Jiang
doaj   +1 more source

Research on the Possibilities of Reusing Mixed Reclaimed Asphalt Materials with a Focus on the Circular Economy

open access: yesApplied Sciences
This article presents the results of a 10-year research study on the possibilities of implementing circular economy principles into the recovery of construction waste in road construction and paving traffic areas.
Martin Decký   +2 more
doaj   +1 more source

Unveiling the endurance limit of SOT-MRAM with CoFeB/MgO/CoFeB junctions: From elemental interdiffusion to array-level reliability

open access: yesNano Research
Spin-orbit torque magnetic random access memory (SOT-MRAM), which is theoretically predicted with “unlimited” endurance, has been regarded as a promising alternative to conventional static random access memory (SRAM)-based L1 to L3 caches in advanced ...
Chuanpeng Jiang   +13 more
doaj   +1 more source

Design of a full 1Mb STT-MRAM based on advanced FDSOI technology

open access: yesMATEC Web of Conferences, 2017
In one hand, the shrinking of CMOS technology nodes is dramatically increasing the leakage current in integrated circuits. In the other hand, modern portable devices first concern is power-efficiency to insure a better autonomy.
Jabeur Kotb, Prenat Guillaume
doaj   +1 more source

Field-free spin–orbit torque devices for logic and neural network applications

open access: yesAPL Machine Learning
Robust field-free spin–orbit torque (SOT) switching plays an essential role in realizing practical SOT-based magnetic memories and logic devices. Leveraging the strong interlayer Dzyaloshinskii–Moriya interaction, field-free SOT switching is achieved ...
Chun-Yi Lin   +4 more
doaj   +1 more source

MODELING OF MTJ AND ITS VALIDATION USING NANOSCALE MRAM BITCELL [PDF]

open access: yesJournal of Engineering Science and Technology, 2017
Magnetic Tunnel Junction (MTJ) is a promising candidate for nonvolatile and low power memory design. MTJ is basic building block of STT-MRAM bitcell.
CHANDRAMAULESHWAR ROY   +2 more
doaj  

Multi-bit MRAM based high performance neuromorphic accelerator for image classification

open access: yesNeuromorphic Computing and Engineering
Binary neural networks (BNNs) are the most efficient solution to bridge the design gap of the hardware implementation of neural networks in a resource-constrained environment.
Gaurav Verma   +3 more
doaj   +1 more source

Design and applications of MRAM based on heterogeneous integration

open access: yesGongneng cailiao yu qijian xuebao
In the post-Moore Era, the dual bottlenecks of the "Memory Wall" and "Power Wall" constrain the performance enhancement of electronic systems. Magnetoresistive random access memory (MRAM), with its non-volatility, high integration density, and ...
Guoqiang ZHAO, Yi ZHAO
doaj   +1 more source

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