Results 21 to 30 of about 16,768 (238)

High-Density 1R/1W Dual-Port Spin-Transfer Torque MRAM

open access: yesMicromachines, 2022
Spin-transfer torque magnetic random-access memory (STT-MRAM) has several desirable features, such as non-volatility, high integration density, and near-zero leakage power.
Yeongkyo Seo, Kon-Woo Kwon
doaj   +1 more source

Proactively Invalidating Dead Blocks to Enable Fast Writes in STT-MRAM Caches

open access: yesIEEE Access, 2022
Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) is a promising emerging memory technology for on-chip caches. It has a low read access time and low leakage power. Unfortunately, however, STT-MRAM suffers from its long write latency and high
Yongjun Kim   +4 more
doaj   +1 more source

A novel BIST for monitoring aging/temperature by self-triggered scheme to improve the reliability of STT-MRAM

open access: yesMicroelectronics and reliability, 2020
This paper proposes a novel methodology to design high reliable STT-MRAM, with self-activated built-in-self-test (BIST) against aging/temperature-induced degradation. During sensing operation, tunneling magnetoresistance (TMR) is monitored, and real-time
Y. Zhou   +4 more
semanticscholar   +1 more source

Finite Element Approach for the Simulation of Modern MRAM Devices

open access: yesMicromachines, 2023
Because of their nonvolatile nature and simple structure, the interest in MRAM devices has been steadily growing in recent years. Reliable simulation tools, capable of handling complex geometries composed of multiple materials, provide valuable help in ...
S. Fiorentini   +7 more
semanticscholar   +1 more source

Proposal of Analog In-Memory Computing With Magnified Tunnel Magnetoresistance Ratio and Universal STT-MRAM Cell [PDF]

open access: yesIEEE Transactions on Circuits and Systems Part 1: Regular Papers, 2021
In-memory computing (IMC) is an effective solution for energy-efficient artificial intelligence applications. Analog IMC amortizes the power consumption of multiple sensing amplifiers with an analog-to-digital converter (ADC) and simultaneously completes
Hao Cai   +6 more
semanticscholar   +1 more source

Size-Dependent Switching Properties of Spin-Orbit Torque MRAM With Manufacturing-Friendly 8-Inch Wafer-Level Uniformity

open access: yesIEEE Journal of the Electron Devices Society, 2020
We have developed a manufacturing-friendly spin-orbit torque magnetic random access memory (SOT-MRAM) technology in CMOS compatible 8-inch fab process.
Sk Ziaur Rahaman   +16 more
doaj   +1 more source

A Comparative Study Between Spin-Transfer-Torque and Spin-Hall-Effect Switching Mechanisms in PMTJ Using SPICE

open access: yesIEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2017
The spin transfer torque magnetoresistive random access memory (STT-MRAM) is the leading candidate for spin-based memories. Nevertheless, the high write energy and read disturbance of the STT-MRAM motivated researchers to find other solutions.
Ibrahim Ahmed   +5 more
doaj   +1 more source

Materials Requirements of High-Speed and Low-Power Spin-Orbit-Torque Magnetic Random-Access Memory

open access: yesIEEE Journal of the Electron Devices Society, 2020
As spin-orbit-torque magnetic random-access memory (SOT-MRAM) is gathering great interest as the next-generation low-power and high-speed on-chip cache memory applications, it is critical to analyze the magnetic tunnel junction (MTJ) properties needed to
Xiang Li   +7 more
doaj   +1 more source

Prospect for antiferromagnetic spintronics [PDF]

open access: yes, 2015
Exploiting both spin and charge of the electron in electronic micordevices has lead to a tremendous progress in both basic condensed-matter research and microelectronic applications, resulting in the modern field of spintronics.
Fina, I., Jungwirth, T., Martí, X.
core   +3 more sources

Embedded Memory Hierarchy Exploration Based on Magnetic Random Access Memory

open access: yesJournal of Low Power Electronics and Applications, 2014
Static random access memory (SRAM) is the most commonly employed semiconductor in the design of on-chip processor memory. However, it is unlikely that the SRAM technology will have a cell size that will continue to scale below 45 nm, due to the leakage ...
Luís Vitório Cargnini   +4 more
doaj   +1 more source

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