Results 121 to 130 of about 6,733 (243)
High-density via RRAM cell with multi-level setting by current compliance circuits
In this work, multi-level storage in the via RRAM has been first time reported and demonstrated with the standard FinFET CMOS logic process. Multi-level states in via RRAM are achieved by controlling the current compliance during set operations.
Yu-Cheng Hsieh +6 more
doaj +1 more source
In this study, silicon carbide (SiC) thin films for resistive random-access memory (RRAM) devices were successfully prepared using the radio-frequency magnetron sputtering method at deposition powers of 50 and 75 W for 1 h.
Kai-Huang Chen +4 more
doaj +1 more source
Random telegraph noise (RTN) in scaled RRAM devices
The random telegraph noise (RTN) related read instability in resistive random access memory (RRAM) is evaluated by employing the RTN peak-to-peak (P-p) amplitude as a figure of merit (FoM).
L. Larcher +12 more
core +1 more source
On‐Chip Learning With Crossbar Arrays for Adaptive Edge Intelligence
Memristor crossbar arrays implemented on chip combines memory, computation, and learning. They allow for adapting the neural weights using the incoming sensor data. This architecture reduces data movement leading to low‐latency, energy‐efficient intelligence in edge while being reliability‐aware co‐design across devices, circuits, and algorithms that ...
Alex James
wiley +1 more source
A CsPbBr3 perovskite quantum dot thermal‐threshold memristor (TTM) with an ultralow 50°C writing threshold, 105–106 on/off ratio, and a 0.28 V reversible erase is reported. A saliency‐driven smart mapping algorithm allocates high‐importance weights to cold regions and low‐importance weights to hotspots.
Shuaidi Wu +8 more
wiley +1 more source
Noise and Drift Models for Protonic ECRAM and Their Impact on Analog In‐Memory Computing
Read noise and conductance drift of protonic electrochemical random‐access memory (ECRAM) are characterized and described using physics‐informed device models. These models connect proton transport and measured current fluctuations to analog in‐memory computing (AIMC) performance.
Xin Su, Haoran Liu, Qing Cao, Ning Li
wiley +1 more source
Reliability of training inputs is essential for hardware‐native neuromorphic learning, as faulty data in sensor fusion generates false triggers due to wrong conductance updates. This work presents a reliability‐aware framework ensuring only trustworthy sensor inputs participate in training, preventing false associations and improving robust decision ...
Tauseef Ejaz +2 more
wiley +1 more source
Circuit reliability of low-power rram-based logic-in-memory architectures
Logic circuits based on Resistive RAM (RRAM) devices and the material implication logic (IMPLY) are promising solutions for low-power logic-in-memory (LiM) architectures.
Zanotti T. +5 more
core +1 more source
Memristor‐Based Neuromorphic Computing for Intelligent Sensing and Edge Applications
Memristor‐based neuromorphic computing provides a promising foundation for energy‐efficient edge intelligence by integrating in‐memory computing, brain‐inspired neural networks, and in‐sensor processing. Memristive devices can emulate neurons and synapses, enabling compact crossbar architectures with reduced data movement, low power consumption, and ...
Hanrui Li, Nazek El‐Atab
wiley +1 more source
Low‐Frequency Noise Evolution in Thin SiNx ReRAMs After Sequential Constant Voltage Stress
In this work, thin SiNx films in MIS ReRAM cells are stressed with a constant voltage for various sequential durations (25, 45, 65, 110 and 250 s) and the low‐frequency noise signal generated after each stress duration is measured using different sampling rates.
Alexandros E. Mavropoulis +7 more
wiley +1 more source

