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An RRAM Biasing Parameter Optimizer [PDF]

open access: yesIEEE Transactions on Electron Devices, 2015
Research on memory devices is a highly active field, and many new technologies are being constantly developed. However, characterizing them and understanding how to bias for optimal performance are becoming an increasingly tight bottleneck. Here, we propose a novel technique for extracting biasing parameters, conducive to desirable switching behavior ...
Serb, Alexantrou   +2 more
openaire   +3 more sources

Neuromorphic Near-Sensor and In-Sensor Computing Enabled by Next-Generation Material-Based Sensors. [PDF]

open access: yesAdv Sci (Weinh)
This Review presents a structural framework that classifies neuromorphic sensing into near‐sensor and in‐sensor architectures, clarifying physical coupling between sensing and computation. The framework connects neural and synaptic device functions with recent advances in optical, mechanical, and chemical sensing, compares energy consumption and ...
Jung SY   +7 more
europepmc   +2 more sources

A Cautionary Note When Looking for a Truly Reconfigurable Resistive RAM PUF

open access: yesTransactions on Cryptographic Hardware and Embedded Systems, 2018
The reconfigurable physically unclonable function (PUF) is an advanced security hardware primitive, suitable for applications requiring key renewal or similar refresh functions.
Kai-Hsin Chuang   +5 more
doaj   +1 more source

A RRAM-Based True Random Number Generator with 2T1R Architecture for Hardware Security Applications

open access: yesMicromachines, 2023
Resistance random access memory (RRAM) based true random number generator (TRNG) has great potential to be applied to hardware security owing to its intrinsic switching variability. Especially the high resistance state (HRS) variation is usually taken as
Bo Peng   +3 more
doaj   +1 more source

An RRAM retention prediction framework using a convolutional neural network based on relaxation behavior

open access: yesNeuromorphic Computing and Engineering, 2023
The long-time retention issue of resistive random access memory (RRAM) brings a great challenge in the performance maintenance of large-scale RRAM-based computation-in-memory (CIM) systems.
Yibei Zhang   +9 more
doaj   +1 more source

Thermal switching of TiO2-based RRAM for parameter extraction and neuromorphic engineering

open access: yes, 2022
Recently, resistive switching random access memory (RRAM) has gained maturity for storage class memory and inmemory computing. For these applications, an improved control of the switching phenomena can lead to higher data density and computing accuracy ...
Drost, Andreas   +11 more
core   +1 more source

Accurate Inference With Inaccurate RRAM Devices: A Joint Algorithm-Design Solution

open access: yesIEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2020
Resistive random access memory (RRAM) is a promising technology for energy-efficient neuromorphic accelerators. However, when a pretrained deep neural network (DNN) model is programmed to an RRAM array for inference, the model suffers from accuracy ...
Gouranga Charan   +5 more
doaj   +1 more source

RRAM variability and its mitigation schemes [PDF]

open access: yes2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2016
Peer ...
Pouman, Peyman   +3 more
openaire   +3 more sources

Resistive Random Access Memory (RRAM): an Overview of Materials, Switching Mechanism, Performance, Multilevel Cell (mlc) Storage, Modeling, and Applications

open access: yesNanoscale Research Letters, 2020
In this manuscript, recent progress in the area of resistive random access memory (RRAM) technology which is considered one of the most standout emerging memory technologies owing to its high speed, low cost, enhanced storage density, potential ...
Furqan Zahoor   +2 more
doaj   +1 more source

Optimization Opportunities in RRAM-based FPGA Architectures [PDF]

open access: yes, 2017
Static Random Access Memory (SRAM)-based routing multiplexers, whatever structure is employed, share a common limitation: their area, delay and power increase linearly with the input size.
De Micheli, Giovanni   +5 more
core   +2 more sources

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