Results 71 to 80 of about 6,733 (243)
Ferroelectric Devices for In‐Memory and In‐Sensor Computing
Inspired by biological systems, in‐memory and in‐sensor computing overcome von Neumann bottlenecks. Ferroelectric devices can mimic synaptic functions and sense stimuli like light or force, therefore are ideal for these paradigms. This review introduces the ferroelectric devices applied for in‐memory and in‐sensor computing, covering their structures ...
Hong Fang +5 more
wiley +1 more source
Advances and Perspectives in Graphene‐Based Quantum Dots Enabled Neuromorphic Devices
Graphene‐based QDs are zero‐dimensional carbon nanomaterials with pronounced quantum confinement and tunable electronic structures. Herein, we summarize their synthesis strategies and functionalization methods, and highlight their functional roles and operating mechanisms in devices, as well as recent advances in neuromorphic electronics. We anticipate
Yulin Zhen +9 more
wiley +1 more source
International audienceCrossbar arrays of resistive memories (RRAM) hold the promise of enabling In-Memory Computing (IMC), but essential challenges due to the impact of device imperfection and device endurance have yet to be overcome.
Nodin, J, F +19 more
core +1 more source
RRAM, which has the characteristics of high speed, low power consumption, easy integration, compatibility with CMOS technology, is a potential NVM technology.
Du, Yifan
core
A Dual‐Programmable 2M NOR Flash Architecture for Energy‐Efficient In‐Memory Computing
In conventional NOR Flash, the access transistor occupies area but stores no information. Here, it is repurposed as a programmable second memory device that plays two functional roles: an analog memory element that lowers the minimum read current from 72.7 nA to 4.22 pA, and a current‐path gating element enabling true‐off pruning and current‐range ...
Suhan Kim +4 more
wiley +1 more source
Ultralow‐Energy Analog Reservoir Computing via Reconfigurable 2‐Transistor Memory
This work presents a reconfigurable reservoir‐computing platform based on an oxide InSnZnO two‐transistor cell in which a hold bias selects volatile relaxation for the reservoir or quasi‐non‐volatile multilevel storage for the readout. Multi‐level hold‐bias kernel tune relaxation currents to generate diverse time constants, enriching reservoir states ...
Jeong‐Min Park +11 more
wiley +1 more source
An MTJ‐based probabilistic processing‐in‐memory architecture unites nonvolatile storage, local entropy generation, and stochastic computation within each memory cell. Stored multi‐bit weights are converted directly into programmable stochastic bitstreams, enabling neural‐network inference, adaptive Ising optimization, and uncertainty‐aware Bayesian ...
Qiuyuan Wang +6 more
wiley +1 more source
Thermal Crosstalk Analysis in RRAM Passive Crossbar Arrays
As the packing density of resistive random access memory (RRAM) devices increases, the effect of thermal cross-talk across the devices in a crossbar array arrangement influences their overall operation significantly.
Chakrabarti, Bhaswar +2 more
core
A Lightweight Reconfigurable RRAM-based PUF for Highly Secure Applications
International audienceRecently, memristors received considerable attention in various applications. Even some of the main drawbacks of resistive memory devices (RRAM), such as variability, have become attractive features for hardware security in the form
Aziza, Hassen +7 more
core +1 more source
Electrochemical metallization and valence change mechanisms are shown to coexist within a single metal halide perovskite memristor, selectively activated by simply reversing the electroforming voltage polarity. Ag‐driven switching delivers low operating voltages and high endurance, while intrinsic ion migration yields superior retention and resistance ...
Ismael Fernandez‐Guillen +4 more
wiley +1 more source

