Dynamic partial reconfiguration scheme for fault-tolerant FFT processor based on FPGA
The Journal of Engineering, 2019 The fast Fourier transform FFT processor is an important part of the space real-time signal processing system based on field programmable gate array (FPGA).
Xin Wei, Yi Z Xie, Yu Xie, He Chen
doaj +1 more source
Compendium of Current Single Event Effects for Candidate Spacecraft Electronics for NASA [PDF]
NASA spacecraft are subjected to a harsh space environment that includes exposure to various types of ionizing radiation. The performance of electronic devices in a space radiation environment are often limited by their susceptibility to single event ...
Berg, Melanie D. +8 more
core +1 more source
RHLP-18T: A Radiation-Hardened 18T SRAM with Enhanced Read Stability and Low Power Consumption
Applied SciencesElectronic equipment in space is constantly exposed to high-energy particles, which can induce Single Event Upsets (SEUs) in memory components, threatening system reliability.
Han-Gyeol Kim, Sung-Hun Jo
doaj +1 more source
NASA Electronic Parts and Packaging (NEPP) Field Programmable Gate Array (FPGA) Single Event Effects (SEE) Test Guideline Update [PDF]
The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic versus mission specific device evaluation, single event latch-up (SEL) test and analysis, SEE response visibility enhancement during radiation testing ...
Berg, Melanie D., LaBel, Kenneth A.
core +1 more source
Atmospheric neutron inducing single event effects on AI chips manufacturing with 8 nm FinFET
Nuclear Engineering and Technology--With the rapid advancement of artificial intelligence (AI) chips in diverse applications, single event effects (SEE) caused by high energy particles in ambient environment have emerged as a critical concern.
Yonghong Li +7 more
doaj +1 more source
Single Event Upset Study of 22 nm Fully Depleted Silicon-on-Insulator Static Random Access Memory with Charge Sharing Effect. [PDF]
Micromachines (Basel), 2023 Yin C, Gao T, Wei H, Chen Y, Liu H.
europepmc +1 more source
NASA Electronic Parts and Packaging Field Programmable Gate Array Single Event Effects Test Guideline Update [PDF]
The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic versus mission specific device evaluation, single event latch-up (SEL) test and analysis, SEE response visibility enhancement during radiation testing ...
Berg, Melanie D., LaBel, Kenneth A.
core +1 more source
NEW MATERIAL FOR ELIMINATING LINEAR ENERGY TRANSFER SENSITIVITIES IN DEEPLY SCALED CMOS TECHNOLOGIES SRAM CELLS [PDF]
, 2010 As technology scales deep in submicron regime, CMOS SRAM memories have become increasingly sensitive to Single-Event Upset sensitivity. Key technological factors that impact Single-Event Upset sensitivity are gate length, gate and drain areas and the ...
Kanyogoro, Esau Nderitu
core
A multi-node-upset-resilient 14T SRAM with high read stability for space applications
Nuclear Engineering and TechnologyThis paper proposes a voltage-booster read-decoupled radiation-hardened 14T (BDRH14T) SRAM cell. In harsh environments such as space, radiation can flip the stored data in memory cells, resulting in soft errors, including single-event upset (SEU) and ...
Sung-Jun Lim, Sung-Hun Jo
doaj +1 more source
Enhancement of Deep Neural Network Recognition on MPSoC with Single Event Upset. [PDF]
Micromachines (Basel), 2023 Yang W +8 more
europepmc +1 more source