A Comprehensive Methodology for Soft Error Rate (SER) Reduction in Clock Distribution Network
ChipsSingle Event Transients (SETs) in clock-distribution networks are a major source of soft errors in synchronous systems. We present a practical framework that assesses SET risk early in the design cycle, before layout and parasitics, using a Vulnerability
Jorge Johanny Saenz-Noval +2 more
doaj +1 more source
From vulnerability to robustness: Radiation-hard isolation for BPR-enabled stacked nanosheet CFETs
Nuclear Engineering and TechnologyThe integration of Buried Power Rail (BPR) and Complementary FET (CFET) technologies is a promising way to improve power efficiency and circuit density in advanced logic devices.
Dongwook Kim +4 more
doaj +1 more source
A Stimulus-free Probabilistic Model for Single-Event-Upset Sensitivity
, 2008 With device size shrinking and fast rising frequency ranges, effect of cosmic radiations and alpha particles known as Single-Event-Upset (SEU), Single-Eventtransients (SET), is a growing concern in logic circuits. Accurate understanding and estimation of
core
TECHNIQUES TO FACILITATE HITLESS RECOVERY FROM A FLASH SINGLE EVENT UPSET (SEU) ERROR THROUGH VIRTUALIZATION [PDF]
Many embedded systems use an embedded MultiMediaCard (eMMC) as the main storage device for such systems. When the eMMC for an embedded system is connected to the host Central Processing Unit (CPU) through an intermediate device, such as a Universal ...
P Le, Son +8 more
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RHLP-18T: A Radiation-Hardened 18T SRAM with Enhanced Read Stability and Low Power Consumption
Applied SciencesElectronic equipment in space is constantly exposed to high-energy particles, which can induce Single Event Upsets (SEUs) in memory components, threatening system reliability.
Han-Gyeol Kim, Sung-Hun Jo
doaj +1 more source
Dynamic partial reconfiguration scheme for fault-tolerant FFT processor based on FPGA
The Journal of Engineering, 2019 The fast Fourier transform FFT processor is an important part of the space real-time signal processing system based on field programmable gate array (FPGA).
Xin Wei, Yi Z Xie, Yu Xie, He Chen
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Investigation of Single Event Upset and Total Ionizing Dose in FeRAM for Medical Electronic Tag
, 2020 -We investigate the single event upset (SEU) and total ionizing dose (TID) tolerance of FeRAMs fabricated in 180-nm technology against neutron and gamma-ray radiation. Our irradiation tests reveal that the FeRAM has an SEU rate of less than 8.5 10 -3 FIT/
Taiki Uemura, Masanori Hashimoto
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Single event upset studies for the ATLAS SCT and pixel optical links [PDF]
, 2000 Optical data transmission has been chosen for the ATLAS Pixel and SemiConductor Tracker to deliver both timing and control information to the detector modules and transmit tracking data to the remote computer room.
Gregor, I M +8 more
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Error detection and correction of single event upset (SEU) tolerant latch
Soft errors are a serious concern in state holder circuits at they can cause temporarily malfunctions. C-elements are one of the state holders that are widely used in asynchronous circuits.
Yakovlev A, Julai N, Bystrov A
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LEO Single Event Upset Emulator for Validation of FPGA Based Avionics Systems [PDF]
This paper presents a complete design and implementation of a Single Event Upset (SEU) emulation system that can be used to inject faults Static Random Access Memory (SRAM) based Field Programmable Gate Array (FPGA).
Asami, Kenichi +6 more
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