Design and qualification of the SEU/TD Radiation Monitor chip [PDF]
This report describes the design, fabrication, and testing of the Single-Event Upset/Total Dose (SEU/TD) Radiation Monitor chip. The Radiation Monitor is scheduled to fly on the Mid-Course Space Experiment Satellite (MSX).
Blaes, Brent R. +4 more
core +1 more source
Effects of cosmic rays on single event upsets [PDF]
Assistance was provided to the Brookhaven Single Event Upset (SEU) Test Facility. Computer codes were developed for fragmentation and secondary radiation affecting Very Large Scale Integration (VLSI) in space.
Fogarty, T. N. +4 more
core +1 more source
USING THE SOCHI STAND TO CONFIRM THE IMMATIBILITY OF THE INTEGRATED CIRCUIT
The paper analyzes the possible to apply of the SOCHI stand for the purpose of controlling the immutability of the chip`s topology in order trust (in reliable and safe operation).
Dmitry V. Bobrovsky +6 more
doaj +1 more source
Xilinx Kintex-UltraScale Field Programmable Gate Array Single Event Effects (SEE) Heavy-Ion Test Report [PDF]
This is an independent investigation that evaluates the single event destructive and transient susceptibility of the Xilinx Kintex-UltraScale device. Design/Device susceptibility is determined by monitoring the device under test (DUT) for Single Event ...
Berg, Melanie +5 more
core +1 more source
Radiation-Hardened 16T SRAM Cell with Improved Read and Write Stability for Space Applications
The critical charge of sensitive nodes decreases as transistors scale down with the advancement of CMOS technology, making SRAM cells more susceptible to soft errors in the space industry.
Jong-Yeob Oh, Sung-Hun Jo
doaj +1 more source
Microsemi RTG4 Rev C Field Programmable Gate Array Single Event Effects (SEE) Heavy-Ion Test Report [PDF]
The goal of this study was to perform an independent investigation of single event destructive and transient susceptibility of the Microsemi RTG4 device. The devices under test were the Microsemi RTG4 field programmable gate array (FPGA) Rev C.
Berg, Melanie D. +6 more
core +1 more source
A Comprehensive Methodology for Soft Error Rate (SER) Reduction in Clock Distribution Network
Single Event Transients (SETs) in clock-distribution networks are a major source of soft errors in synchronous systems. We present a practical framework that assesses SET risk early in the design cycle, before layout and parasitics, using a Vulnerability
Jorge Johanny Saenz-Noval +2 more
doaj +1 more source
Heavy ion induced Single Event Phenomena (SEP) data for semiconductor devices from engineering testing [PDF]
The accumulation of JPL data on Single Event Phenomena (SEP), from 1979 to August 1986, is presented in full report format. It is expected that every two years a supplement report will be issued for the follow-on period. This data for 135 devices expands
Coss, James R. +4 more
core +1 more source
From vulnerability to robustness: Radiation-hard isolation for BPR-enabled stacked nanosheet CFETs
The integration of Buried Power Rail (BPR) and Complementary FET (CFET) technologies is a promising way to improve power efficiency and circuit density in advanced logic devices.
Dongwook Kim +4 more
doaj +1 more source
The physics of a single-event upset in integrated circuits: A review and critique of analytical models for charge collection [PDF]
When an energetic particle (kinetic energy 0.5 MeV) originating from a radioactive decay or a cosmic ray transverse the active regions of semiconductor devices used in integrated circuit (IC) chips, it leaves along its track a high density electron hole
Vonroos, O., Zoutendyk, J.
core +1 more source

