Results 11 to 20 of about 117,391 (253)
The effect of transistors in abutted rows on charge sharing is investigated by changing the configuration of the transistors in abutted rows in this work.
Xiaowei He +3 more
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This study analyzes the effects of the punch-through stop (PTS) layer and well depth in a bulk FinFET SRAM cell on the fraction of charge generated by an ion impact that is collected by the FinFET channel.
Antonio Calomarde +3 more
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Current mirror utilizing an extra transistor for single‐event‐induced charge dissipation is proposed. This technique involves two inverters and a dissipation transistor. The inverters are employed as a sensor that turns on the dissipation transistor when
Jingtian Liu +5 more
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A Single-Event-Hardened Scheme of Phase-Locked Loop Microsystems for Aerospace Applications
In order to improve the ability of the phase-locked loop (PLL) microsystem applied in the aerospace environment to suppress the irradiation effect, this study presents an efficient charge pump hardened scheme by using the radiation-hardened-by-design ...
Qi Xiang, Hongxia Liu, Yulun Zhou
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A Single-Event Transient (SET) Tolerant Dynamic Bias Comparator in 65-nm CMOS
<p>A single-event transient (SET) tolerant dynamic bias comparator leveraging path-splitting is presented in this paper. The dynamic bias structure with a tail capacitor is found to be vulnerable to positive and negative SET transients. A negative transient on the tail transistor doubles the energy per conversion. A positive transient on the tail
Andrew Ash, John Hu
openaire +1 more source
Active Radiation-Hardening Strategy in Bulk FinFETs
In this article, we present a new method to mitigate the effect of the charge collected by trigate FinFET devices after an ionizing particle impact. The method is based on the creation of an internal structure that generates an electrical field that ...
Antonio Calomarde +3 more
doaj +1 more source
Single‐event transients (SETs) due to heavy‐ion (HI) strikes adversely affect the electronic circuits in the sub‐100 nm regime in the radiation environment.
Arumugam Karthigeyan +2 more
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Single event response of ferroelectric spacer engineered SOI FinFET at 14 nm technology node
The impact of spacer on the single event response of SOI FinFET at 14 nm technology node is investigated. Based on the device TCAD model, well-calibrated by the experimental data, it is found that the spacer presents the enhancement on single event ...
Baojun Liu, Jing Zhu
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Mitigation of Single-Event Effects in SiGe-HBT Current-Mode Logic Circuits
It has been known that negative feedback loops (internal and external) in a SiGe heterojunction bipolar transistors (HBT) DC current mirrors improve single-event transient (SET) response; both the peak transient current and the settling time ...
Md Arifur R. Sarker +8 more
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Single Event Effect Analysis of SiGe Low Noise Amplifier
This paper analyzes the single event transient (SET) response of low noise amplifier (LNA) designed using SiGe heterojunction bipolar transistors (HBT).
Manel Bouhouche, Saida Latreche
doaj +1 more source

