Characterizing SRAM Single Event Upset in Terms of Single and Double Node Charge Collection [PDF]
, 2008 A well-collapse source-injection mode for SRAM SEU is demonstrated through TCAD modeling. The recovery of the SRAM s state is shown to be based upon the resistive path from the p+-sources in the SRAM to the well.
Ball, D. R., II +13 more
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A guideline for heavy ion radiation testing for Single Event Upset (SEU) [PDF]
A guideline for heavy ion radiation testing for single event upset was prepared to assist new experimenters in preparing and directing tests. How to estimate parts vulnerability and select an irradiation facility is described.
Malone, C., Nichols, D. K., Price, W. E.
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Radiation Hardened NULL Convention Logic Asynchronous Circuit Design
Journal of Low Power Electronics and Applications, 2015 This paper proposes a radiation hardened NULL Convention Logic (NCL) architecture that can recover from a single event latchup (SEL) or single event upset (SEU) fault without deadlock or any data loss.
Liang Zhou, Scott C. Smith, Jia Di
doaj +1 more source
Effects of cosmic rays on single event upsets [PDF]
Assistance was provided to the Brookhaven Single Event Upset (SEU) Test Facility. Computer codes were developed for fragmentation and secondary radiation affecting Very Large Scale Integration (VLSI) in space.
Fogarty, T. N. +4 more
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Estimation method for bit upset ratio of NAND flash memory induced by heavy ion irradiation
AIP AdvancesIn order to estimate the bit upset ratio of NAND flash memory induced by heavy ion irradiation, starting from the physical mechanism of the bit upset of NAND flash memory, an analytical model based on statistical methods was developed to describe the ...
Jiangkun Sheng +9 more
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Heavy Ion and Proton-Induced Single Event Upset Characteristics of a 3D NAND Flash Memory [PDF]
We evaluated the effects of heavy ion and proton irradiation for a 3D NAND flash. The 3D NAND showed similar single-event upset (SEU) sensitivity to a planar NAND of identical density in the multiple-cell level (MLC) storage mode.
Chen, Dakai +6 more
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Two-photon laser-assisted device alteration in silicon integrated-circuits [PDF]
, 2013 Optoelectronic imaging of integrated-circuits has revolutionized device design debug, failure analysis and electrical fault isolation; however modern probing techniques like laser-assisted device alteration (LADA) have failed to keep pace with the ...
Bodoh, Dan +7 more
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Fault Tolerance Implementation within SRAM Based FPGA Designs based upon Single Event Upset Occurrence Rates [PDF]
, 2006 Emerging technology is enabling the design community to consistently expand the amount of functionality that can be implemented within Integrated Circuits (ICs).
Berg, Melanie
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Yuanzineng kexue jishuIn order to ensure the reliability of heavy ion single event effect experimental data and the accuracy of space on-orbit single event error rate prediction, the research was conducted on the method of predicting the equivalent silicon layer thickness ...
LUO Yinhong, ZHANG Fengqi, WANG Tan, DING Lili, JIANG Xinshuai
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Xilinx Kintex-UltraScale Field Programmable Gate Array Single Event Effects (SEE) Heavy-Ion Test Report [PDF]
This is an independent investigation that evaluates the single event destructive and transient susceptibility of the Xilinx Kintex-UltraScale device. Design/Device susceptibility is determined by monitoring the device under test (DUT) for Single Event ...
Berg, Melanie +5 more
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