Results 1 to 10 of about 1,246 (262)
Mitigating bit flips or single event upsets in epilepsy neurostimulators [PDF]
Objectives: The objective of this study was to review software errors known as single event upsets (SEUs) or bit flips due to cosmic rays in epilepsy neurostimulators. Materials and methods: A case report of a single event upset or bit flip is discussed;
Alice X. Dong +4 more
doaj +4 more sources
Soft-Error-Resilient Static Random Access Memory with Enhanced Write Ability for Radiation Environments [PDF]
As semiconductor technologies advance, SRAM cells deployed in space systems face heightened sensitivity to radiation-induced soft errors. In conventional 6T SRAM, when high-energy particles strike sensitive nodes, single-event upsets (SEUs) may occur ...
Se-Yeon Park, Eun Gyo Jeong, Sung-Hun Jo
doaj +2 more sources
This paper presents two novel quadruple cross-coupled memory cell designs, namely QCCM10T and QCCM12T, with protection against single event upsets (SEUs) and double-node upsets (DNUs).
Aibin Yan +6 more
doaj +3 more sources
Low power and high-speed quadrate node upset tolerant latch design using CNTFET [PDF]
Scalability, leakage, short-channel effects, and reliability problems are some of the difficulties facing the semiconductor industry as it continues to experience a reduction in size.
Shaik Asiya, Satheesh Kumar S
doaj +2 more sources
Comparative Analysis of the Aeronautical Certification Process Against Nonionizing Radiation and the Management Proposal for Ionizing Radiation [PDF]
Today, the certification process for onboard electro-electronic systems against nonionizing radiation can be considered mature and independent, having its own set of requirements.
Marcelo Tadeu Ferreira +1 more
doaj +2 more sources
Bootstrapped Driver and the Single-Event-Upset Effect [PDF]
As VLSI circuits are progressing in very Deep Submicron (DSM) regime without decreasing chip area, the importance of global interconnects increases but at the cost of performance and power consumption. This work proposes a low power circuit for driving a global interconnect at voltages close to the noise level. In order to address ultra-low power (ULP)
Mohammed Al-daloo +3 more
openaire +2 more sources
A computational analysis on the role of low energy proton-induced single event upset in a 65 nm CMOS SRAM [PDF]
This investigation is a computational analysis of a kind of radiation effect on electronic devices, known as the single event upset (SEU) with the Geant4 toolkit.
M. Soleimaninia,, G. Raisali, A. Moslehi
doaj +1 more source
Space Electrostatic Discharge Effect (SESD) and Single Event Effect (SEE) are two major space environmental factors that cause spacecraft failure. Previous studies have established that both can lead to soft errors such as upset of memory cells.
Xuan Wang +5 more
doaj +1 more source
Single Event Upset: An Embedded Tutorial [PDF]
With the continuous downscaling of CMOS technologies, the reliability has become a major bottleneck in the evolution of the next generation systems. Technology trends such as transistor down-sizing, use of new materials, and system on chip architectures continue to increase the sensitivity of systems to soft errors.
Fan Wang, Vishwani D. Agrawal
openaire +1 more source
In Universe, there are innumeral activities that keep on happening and a lot of effects that are produced as outcomes. One such example is Single Event Upset. SEU is the error generated in the operation performed by a due to the strike between a single ionizing particle like electron, proton or neutron and a sensitive node in micro-electronic device ...
Jilani, Aavesh +2 more
openaire +1 more source

