Results 11 to 20 of about 1,246 (262)

Single Event Upsets Under Proton, Thermal, and Fast Neutron Irradiation in Emerging Nonvolatile Memories

IEEE Access, 2022
In New Space, the need for reduced cost, higher performance, and more prompt delivery plans in radiation-harsh environments have motivated spacecraft designers to use Commercial-Off-The-Shelf (COTS) memories and emerging technology devices.
Golnaz Korkian, Daniel Leon, Francisco J. Franco, Juan C. Fabero, Manon Letiche, Yolanda Morilla, Pedro Martin-Holgado, Helmut Puchner, Hortensia Mecha, Juan A. Clemente   +9 more
doaj   +1 more source

Single-Event Upsets in Microelectronics [PDF]

MRS Bulletin, 2003
AbstractThis article introduces the February 2003 issue of MRS Bulletin on “Single-Event Upsets (SEUs) in Microelectronics.” These radiation effects in devices and circuits have been recognized in recent years as a key reliability concern for many current and future silicon-based technologies.
Henry H.K. Tang, Nils Olsson
openaire   +1 more source

Monitor of the single event upsets and linear energy transfer of space radiation on the Beidou navigation satellites

Open Astronomy, 2023
The single event effect caused by space heavy ion radiation is one of the important factors affecting the safety and operation of spacecraft on orbit.
Zhang Binquan, Zhang Shenyi, Shen Guohong, Tuo Changsheng, Zhang Xin, Zhang Huanxin, Quan Lin, Tian Chao, Hou Donghui, Zhou Ping, Ji Wentao   +10 more
doaj   +1 more source

Efficacy of Transistor Interleaving in DICE Flip-Flops at a 22 nm FD SOI Technology Node

Applied Sciences, 2022
Fully Depleted Silicon on Insulator (FD SOI) technology nodes provide better resistance to single event upsets than comparable bulk technologies, but upsets are still likely to occur at nano-scale feature sizes, and additional hardening techniques should
Christopher J. Elash, Zongru Li, Chen Jin, Li Chen, Jiesi Xing, Zhiwu Yang, Shuting Shi   +6 more
doaj   +1 more source

Highly Reliable Quadruple-Node Upset-Tolerant D-Latch

IEEE Access, 2022
As CMOS technology scaling pushes towards the reduction of the length of transistors, electronic circuits face numerous reliability issues, and in particular nodes of D-latches at nano-scale confront multiple-node upset errors due to their operation in ...
Seyedehsomayeh Hatefinasab, Akiko Ohata, Alfonso Salinas, Encarnacion Castillo, Noel Rodriguez   +4 more
doaj   +1 more source

Custom Scrubbing for Robust Configuration Hardening in Xilinx FPGAs

Instruments, 2019
The usage of SRAM-based Field Programmable Gate Arrays on High Energy Physics detectors is mostly limited by the sensitivity of these devices to radiation-induced upsets in their configuration.
Raffaele Giordano, Dario Barbieri, Sabrina Perrella, Roberto Catalano   +3 more
doaj   +1 more source

Measurements of Single Event Upset in ATLAS IBL

Journal of Instrumentation, 2020
Effects of Single Event Upsets (SEU) and Single Event Transients (SET) are studied in the FE-I4B chip of the innermost layer of the ATLAS pixel system. SEU/SET affect the FE-I4B Global Registers as well as the settings for the individual pixels, causing, among other things, occupancy losses, drops in the low voltage currents, noisy pixels, and silent ...
Balbi, G., Barbero, M., Beccherle, R., Bindi, M., Breugnon, P., Butti, P., Cinca, D., Dickinson, J., Ferrere, D., Fougeron, D., Garcia-Sciveres, M., Garcia Pascual, J., Gaudiello, A., Gemme, C., Giangiacomi, N., Hemperek, T., Jeanty, L., Kepka, O., Kocian, M., Lantzsch, K., Liu, P., Martin, C., Mekkaoui, A., Menouni, M., Potamianos, K., Rozanov, A., Takubo, Y., Wensing., M.   +27 more
openaire   +6 more sources

Formal Verification of Fault-Tolerant Hardware Designs

IEEE Access, 2023
Digital circuits for space applications can suffer from operation failures due to radiation effects. Error detection and mitigation techniques are widely accepted solutions to improve dependability of digital circuits under Single Event Upsets (SEUs) and
Luis Entrena, Antonio J. Sanchez-Clemente, Luis A. Garcia-Astudillo, Marta Portela-Garcia, Mario Garcia-Valderas, Almudena Lindoso, Roberto Sarmiento   +6 more
doaj   +1 more source

Modeling Application-Level Soft Error Effects for Single-Event Multi-Bit Upsets

IEEE Access, 2019
Transient errors induced by radiations cause bit-flips in flip-flops (flip-flop soft errors). Modeling the error resilience level of a target system for flip-flop soft errors is a crucial step to achieve a cost-effective error resilience solution.
Hyungmin Cho, Kon-Woo Kwon
doaj   +1 more source

Nwise and Pwise: 10T Radiation Hardened SRAM Cells for Space Applications With High Reliability Requirements

IEEE Access, 2022
SRAM cells are widely used to design memory blocks of, e.g., caches, register files, and translation lookaside buffers. Depending on the SRAM application, the design requirements are different.
Azam Seyedi, Snorre Aunet, Per Gunnar Kjeldsberg   +2 more
doaj   +1 more source