Results 11 to 20 of about 260 (218)

Mitigating bit flips or single event upsets in epilepsy neurostimulators

Epilepsy and Behavior Case Reports, 2016
Objectives: The objective of this study was to review software errors known as single event upsets (SEUs) or bit flips due to cosmic rays in epilepsy neurostimulators. Materials and methods: A case report of a single event upset or bit flip is discussed;
Alice X. Dong, Ryder P. Gwinn, Nicole M. Warner, Lisa M. Caylor, Michael J. Doherty   +4 more
doaj   +1 more source

Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets

IEEE Access, 2019
This paper presents two novel quadruple cross-coupled memory cell designs, namely QCCM10T and QCCM12T, with protection against single event upsets (SEUs) and double-node upsets (DNUs).
Aibin Yan, Jun Zhou, Yuanjie Hu, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen   +6 more
doaj   +1 more source

Custom Scrubbing for Robust Configuration Hardening in Xilinx FPGAs

Instruments, 2019
The usage of SRAM-based Field Programmable Gate Arrays on High Energy Physics detectors is mostly limited by the sensitivity of these devices to radiation-induced upsets in their configuration.
Raffaele Giordano, Dario Barbieri, Sabrina Perrella, Roberto Catalano   +3 more
doaj   +1 more source

Highly Reliable Quadruple-Node Upset-Tolerant D-Latch

IEEE Access, 2022
As CMOS technology scaling pushes towards the reduction of the length of transistors, electronic circuits face numerous reliability issues, and in particular nodes of D-latches at nano-scale confront multiple-node upset errors due to their operation in ...
Seyedehsomayeh Hatefinasab, Akiko Ohata, Alfonso Salinas, Encarnacion Castillo, Noel Rodriguez   +4 more
doaj   +1 more source

Measurements of Single Event Upset in ATLAS IBL

Journal of Instrumentation, 2020
Published by Inst.
Balbi, G., Barbero, M., Beccherle, R., Bindi, M., Breugnon, P., Butti, P., Cinca, D., Dickinson, J., Ferrere, D., Fougeron, D., Garcia-Sciveres, M., Garcia Pascual, J., Gaudiello, A., Gemme, C., Giangiacomi, N., Hemperek, T., Jeanty, L., Kepka, O., Kocian, M., Lantzsch, K., Liu, P., Martin, C., Mekkaoui, A., Menouni, M., Potamianos, K., Rozanov, A., Takubo, Y., Wensing., M.   +27 more
openaire   +7 more sources

Formal Verification of Fault-Tolerant Hardware Designs

IEEE Access, 2023
Digital circuits for space applications can suffer from operation failures due to radiation effects. Error detection and mitigation techniques are widely accepted solutions to improve dependability of digital circuits under Single Event Upsets (SEUs) and
Luis Entrena, Antonio J. Sanchez-Clemente, Luis A. Garcia-Astudillo, Marta Portela-Garcia, Mario Garcia-Valderas, Almudena Lindoso, Roberto Sarmiento   +6 more
doaj   +1 more source

Modeling Application-Level Soft Error Effects for Single-Event Multi-Bit Upsets

IEEE Access, 2019
Transient errors induced by radiations cause bit-flips in flip-flops (flip-flop soft errors). Modeling the error resilience level of a target system for flip-flop soft errors is a crucial step to achieve a cost-effective error resilience solution.
Hyungmin Cho, Kon-Woo Kwon
doaj   +1 more source

Nwise and Pwise: 10T Radiation Hardened SRAM Cells for Space Applications With High Reliability Requirements

IEEE Access, 2022
SRAM cells are widely used to design memory blocks of, e.g., caches, register files, and translation lookaside buffers. Depending on the SRAM application, the design requirements are different.
Azam Seyedi, Snorre Aunet, Per Gunnar Kjeldsberg   +2 more
doaj   +1 more source

Design of Static Random-Access Memory Cell for Fault Tolerant Digital System

Applied Sciences, 2022
This paper comparatively analyzes the static random-access memory (SRAM) cell designs for fault tolerance. Since SRAM cells are sensitive to radiation-induced single event upsets, various circuit-level approaches have been applied.
Taehwan Yoon, Jihwan Park, Hanwool Jeong
doaj   +1 more source

Energy-Efficient Dual-Node-Upset-Recoverable 12T SRAM for Low-Power Aerospace Applications

IEEE Access, 2023
With technology scaling, transistor sizing as well as the distance between them, is decreasing rapidly, thereby reducing the critical charge of sensitive nodes. This reduction makes SRAM cells used for aerospace applications more susceptible to radiation
Soumitra Pal, Gajendranath Chowdary, Wing-Hung Ki, Chi-Ying Tsui   +3 more
doaj   +1 more source