Results 21 to 30 of about 10,650 (234)
A Fast-Lock All-Digital Clock Generator for Energy Efficient Chiplet-Based Systems
An all-digital clock frequency multiplier that achieves excellent locking time for an energy-efficient chiplet-based system-on-chip (SoC) design is presented.
Junghoon Jin, Seungjun Kim, Jongsun Kim
doaj +1 more source
A Low-Resources TDC for Multi-Channel Direct ToF Readout Based on a 28-nm FPGA
In this paper, we present a proposed field programmable gate array (FPGA)-based time-to-digital converter (TDC) architecture to achieve high performance with low usage of resources.
Mojtaba Parsakordasiabi +3 more
doaj +1 more source
An almost all-digital time-to-digital converter (TDC) possessing subpicosecond resolutions, scalable dynamic ranges, high linearity, high noise immunity, and moderate conversion rates can be achieved by a random sampling-and-averaging (RSA) approach with
Tony Wu, Tzu-Chien Hsueh
doaj +1 more source
Time to digital converter (TDC) is a key block for time-gated single photon avalanche diode (SPAD) arrays for Raman spectroscopy that applicable in the agricultural products and food analysis. In this paper a new dual slope time to digital converter that
Mahdi Rezvanyvardom +2 more
doaj +1 more source
A three-dimensional (3D) image sensor based on Single-Photon Avalanche Diode (SPAD) requires a time-to-digital converter (TDC) with a wide dynamic range and fine resolution for precise depth calculation. In this paper, we propose a novel high-performance
Zunkai Huang +6 more
doaj +1 more source
An 8-bit TDC implemented with two nested Johnson counters
This work presents a Time-to-Digital Converter implemented using two nested Johnson counters and suitable for time-lapse measurement applications. The proposed structure is composed of two 4-bit nested counters, two digital-logic control networks, two ...
Jonathan Santiago-Fernandez +3 more
doaj +1 more source
The Modern FPGA as Discriminator, TDC and ADC [PDF]
Recent generations of Field Programmable Gate Arrays (FPGAs) have become indispensible tools for complex state machine control and signal processing, and now routinely incorporate CPU cores to allow execution of user software code.
+10 more
core +2 more sources
This paper presents a time-to-digital converter (TDC) based on a field programmable gate array (FPGA) with a tapped delay line (TDL) architecture. This converter employs dual delay lines (DDLs) to enable real-time calibrations, and the proposed DDL-TDC ...
Yuan-Ho Chen
doaj +1 more source
Cross-Talk Issues in Time Measurements
The enormous diffusion of Time-Mode circuits, in particular Time-to-Digital Converter (TDC) time measurement circuits, and at the same time the dizzying increase in parallel channels required by the most recent applications, for example in the automotive
Nicola Lusardi +4 more
doaj +1 more source
Design of a compact and low-power TDC for an array of SiPM's in 110nm CIS technology [PDF]
Silicon photomultipliers (SiPMs) are meant to substitute photomultiplier tubes in high-energy physics detectors and nuclear medicine. This is because of their -to name a few interesting properties- compactness, lower bias voltage, tolerance to magnetic ...
Bandi, Franco +3 more
core +1 more source

