Results 51 to 60 of about 725 (202)
Low Power and Energy‐Efficient Design of MTJ/FinFET Circuits
This work begins by outlining the fundamental concepts of MTJs, FinFETs, and the conventional hybrid CMOS/MTJ framework. It then explains the operating mechanism and configuration of the proposed STT‐MTJ/FinFET‐based OR logic gate. The final sections present the simulation outcomes and analyze the influence of FinFET fin variation.
Pillem Ramesh, Atul S. M. Tripathi
wiley +1 more source
Sub-10-nm Asymmetric Junctionless Tunnel Field-Effect Transistors
This study presents a new asymmetric junctionless tunnel field-effect transistor (AJ-TFET) to scale TFETs into sub-10-nm regimes. The asymmetric junctionless p+ source/body and junctional n/p+ drain/body separately optimize the lateral source and drain ...
Chun-Hsing Shih, Nguyen Van Kien
doaj +1 more source
Investigation of Single-Event-Transient Effects Induced by Heavy-Ion in All-Silicon DG-TFET
The heavy-ion analysis is a single-event-effect (SEE) that produces a single-event-transient (SET) pulse of current. In this work, the analysis was done to observe the maximum impact of heavy-ions on a calibrated double-gate tunnel field-effect ...
Ashish Maurya +3 more
doaj +1 more source
Design and TCAD Simulation of p+–n+ InAs‐Based TFET
A physics‐based design and optimization of a p+−n+${{p}^ + } - {{n}^ + }$ InAs tunnel field‐effect transistor is presented using calibrated quantum‐corrected TCAD simulations. By employing a composite figure of merit that unifies digital and RF metrics, the proposed homojunction architecture achieves steep subthreshold swing, enhanced cutoff frequency,
Muhammad Elgamal +5 more
wiley +1 more source
Electrical characterization of si nanowire GAA-TFET based ondimensions downscaling
This research paper explains the effect of the dimensions of Gate-all-aroundSi nanowire tunneling field effect transistor (GAA Si-NW TFET) onON/OFF current ratio, drain induces barrier lowering (DIBL), sub-thresholdswing (SS), and threshold voltage (VT).
Firas Natheer (16958826)
core +1 more source
Two‐dimensional MA2Z4 such as MoSi2N4 offer a new path to extend transistor scaling beyond the limits of silicon. Due to their exceptional properties, these 2D semiconductors are promising candidates for future Ångström‐scale CMOS technology. This review outlines the computational design and roadmap bridging materials discovery, device design and ...
Che Chen Tho +11 more
wiley +1 more source
Simulation Based Investigation of Triple Heterojunction TFET (THJ-TFET) for Low Power Applications
We designed a new model tunnel feld-efect transistor (TFET) based on Triple Heterojunction Tunnel Field Efect Transistor (THJ-TFET) is investigated and designed in this paper.
Adilakshmi, G +6 more
core +1 more source
Electrical Transport of Nb‐Doped MoS2 Homojunction P–N Diode: Investigating NDR and Avalanche Effect
Niobium (Nb)‐doped molybdenum disulfide (MoS2) p‐type–n‐type (p–n) homojunction diodes are engineered using thickness‐controlled homo‐interfaces. Current–voltage (I–V) characteristics reveal gate‐tunable rectification, wavelength‐dependent photoresponse, and low‐bias switching.
Ehsan Elahi +10 more
wiley +1 more source
Comparative Study of Steep Switching Devices for 1T Dynamic Memory
This work focuses on understanding the operation and performance of various steep switching devices (subthreshold slope sub 60 mV/decade), namely Thin-Capacitively Coupled Thyristor (TCCT), Field Effect Diode (FED), Zero sub-threshold swing and Zero ...
Nupur Navlakha +3 more
doaj +1 more source
Electrostatically-Doped Hetero-Barrier Tunnel Field Effect Transistor: Design and Investigation
In this paper, an electrostatically-doped hetero-barrier tunnel-field-effect-transistor (EDHet-TFET) based on stepped broken-gap (type-III) is simulated, investigated, and compared with the conventionally-doped stepped broken-gap hetero-barrier TFET (Het-
M. Ehteshamuddin +2 more
doaj +1 more source

