Results 41 to 50 of about 15,872,035 (205)

Sub-10nm tunnel field-effect transistor with graded Si/Ge heterojunction

, 2011
This study presents a new sub-10-nm tunnel field-effect transistor (TFET) with bandgap engineering using a graded Si/Ge heterojunction. Both the height and width of the tunneling barrier are highly controlled by applying gate voltages to ensure a near ...
Chun-Hsing Shih, Nguyễn, Đăng Chiến   +1 more
core   +1 more source

Electrical characterization of si nanowire GAA-TFET based on dimensions downscaling [PDF]

, 2020
This research paper explains the effect of the dimensions of Gate-all-around Si nanowire tunneling field effect transistor (GAA Si-NW TFET) on ON/OFF current ratio, drain induces barrier lowering (DIBL), sub-threshold swing (SS), and threshold voltage ...
Abdul-Kadir, Firas Natheer, Hashim, Yasir, Firas Natheer Abdul-Kadir, Shakib, Mohammed Nazmus, Taha, Faris Hassan, Mohammed Nazmus Shakib, Faris Hassan Taha, Yasir Hashim, Shakib, Muhammad Nazmus   +8 more
core   +1 more source

Controlling Ambipolar Current in Tunneling FETs Using Overlapping Gate-on-Drain

IEEE Journal of the Electron Devices Society, 2014
In this paper, we have demonstrated that overlapping the gate on the drain can suppress the ambipolar conduction, which is an inherent property of a tunnel field effect transistor (TFET).
Dawit B. Abdi, M. Jagadesh Kumar
doaj   +1 more source

Simulation of Dual-Material Hetero-Double Gate Tunnel Field Effect Transistor (TFET) in Sub-Micron Region

Journal of Engineering Technology and Applied Physics, 2023
To meet the performance requirements of low power mobile devices, a device with a high ION/IOFF ratio at low-VDD is needed. TFETs are gaining popularity due to their low subthreshold slope and high transconductance compared to MOSFETs.
Tan Chun Fui, Ajay Kumar Singh
doaj   +1 more source

Low‐Dimensional Materials and Van Der Waals Heterostructures for Energy Application: A Comprehensive Review

ENERGY &ENVIRONMENTAL MATERIALS, EarlyView.
Low‐dimensional materials (0D, 1D, and 2D) exhibit unique electronic and physicochemical properties, enabling advanced nanoelectronic and optoelectronic devices. Mixed‐dimensional heterostructures combine these materials to enhance functionality.
Qaisar Alam, Sajjad Ali, Pir Muhammad Ismail, ABM Sharif Hossain   +3 more
wiley   +1 more source

Dual Metal Triple-gate-dielectric (DM_TGD) Tunnel Field Effect Transistor: A Novel Structure for Future Energy Efficient Device

, 2021
Background: Power reduction is a serious design concern for submicron logic circuits, which can be achieved by scaling the supply voltage. Modern Field Effect Transistor (FET) circuits require at least 60 mV of gate voltage for better current drive at ...
Singh, Ajay Kumar, Tan, Chun Fui
core   +1 more source

The Evolution of Semiconductor Devices: From Transistors to Quantum and Neuromorphic Computing

physica status solidi (RRL) – Rapid Research Letters, Volume 20, Issue 8, August 2026.
This review presents the evolution of semiconductor devices from BJTs to fin field‐effect transistors (FinFETs), nanowire, and carbon nanotube transistors. It highlights emerging materials, including SiC and GaN, and examines neuromorphic and quantum computing, industry applications, performance benchmarks, challenges, and future directions.
Manoharan Subramanian, Mahalakshmi Balan, Ananthi Kaliyamoorthy, Esakki Muthu Sankaran, Govindaraj Vellingiri, Gianluca Gatto, Amit Kumar   +6 more
wiley   +1 more source

Electron‐Wave Interference in Zener Tunneling Induced by Dopant Clusters in Silicon pn Junctions

Advanced Quantum Technologies, Volume 9, Issue 7, July 2026.
Current oscillations are revealed in the Zener tunneling regime of Si nanoscale pn junctions and are attributed to the interference of coherent electron‐waves in band‐to‐band tunneling transport. Temperature dependence, simulations of random dopant distributions, and numerical interference calculations collectively demonstrate that the interference ...
Daris Alfafa, Michiharu Tabe, Yukinori Ono, Arief Udhiarto, Daniel Moraru   +4 more
wiley   +1 more source

Drain Current Model for Double Gate Tunnel-FETs with InAs/Si Heterojunction and Source-Pocket Architecture

Nanomaterials, 2019
The practical use of tunnel field-effect transistors is retarded by the low on-state current. In this paper, the energy-band engineering of InAs/Si heterojunction and novel device structure of source-pocket concept are combined in a single tunnel field ...
Hongliang Lu, Bin Lu, Yuming Zhang, Yimen Zhang, Zhijun Lv   +4 more
doaj   +1 more source

Atomic Layer Deposition in Transistors and Monolithic 3D Integration

Advanced Functional Materials, Volume 36, Issue 41, 21 May 2026.
Transistors are fundamental building blocks of modern electronics. This review summarizes recent progress in atomic layer deposition (ALD) for the synthesis of two‐dimensional (2D) metal oxides and transition‐metal dichalcogenides (TMDCs), with particular emphasis on their enabling role in monolithic three‐dimensional (M3D) integration for next ...
Yue Liu, Taoyu Zou, Cheng‐Yan Xu, Liang Zhen, Yang Li, Yong‐Young Noh   +5 more
wiley   +1 more source