Results 71 to 80 of about 1,247 (194)
Nano Select, Volume 6, Issue 11, November 2025.In this study, we analyzed the sensing characteristics of a MoS₂‐based dual‐drain, dual‐gate Schottky tunnel field effect transistor (DD‐DG‐STFET) based on the hybridization process to achieve ground breaking sensitivity. DD‐DG‐STFET sensitivity was calculated by examining steric hindrance across various patterns, including concave and convex, as well ...
Anusuya Periyasami, Prashanth Kumar
wiley +1 more source
Advances in MXene‐Based Electronics via Surface and Structural Redesigning and Beyond
Advanced Electronic Materials, Volume 11, Issue 14, September 4, 2025.Herein, various MXenes surface and structural engineering strategies such as termination control, doping, interlayer design, and heterostructures are reviewed for advanced electronics applications. We discuss how these approaches optimize conductivity, work function, and device integration, enabling breakthroughs in transistors, photodetectors, and ...
Adnan Younis +8 more
wiley +1 more source
Demonstration of Fin-Tunnel Field-Effect Transistor with Elevated Drain
Micromachines, 2019 In this paper, a novel tunnel field-effect transistor (TFET) has been demonstrated. The proposed TFET features a SiGe channel, a fin structure and an elevated drain to improve its electrical performance. As a result, it shows high-level ON-state current (
Jang Hyun Kim +4 more
doaj +1 more source
Atlas Based Simulation of Double Gate Tunnel Field Effect Transistor [PDF]
, 2016 With the advancement in technology various devices are designed with the complex structure of processors. In this simulation through the study of Double Gate Tunnel FET, device parameters are studied to meet the requirements of the technological ...
Katiyar, Jyotsna
core
Device Physics and Architecture Advances in Tunnel Field‐Effect Transistors
Interdisciplinary Materials, Volume 4, Issue 5, Page 686-708, September 2025.The key for performance breakthroughs in TFET, the most promising beyond‐CMOS transistor, lies in refining the optimal parameters in device physics to advance the material and architecture design. This review summarizes the key points, including electrostatic screening length λ, carrier effective mass m T *, interface‐trap density D it, etc., and ...
Zehan Wu +3 more
wiley +1 more source
Band-Offset Engineering for GeSn-SiGeSn Hetero Tunnel FETs and the Role of Strain
IEEE Journal of the Electron Devices Society, 2015 In this paper a simulation study of the effect of conduction and valence band offsets on the subthreshold swing (SS) of a double-gate tunnel field-effect transistor (TFET) with gate-overlapped source is presented.
Saurabh Sant, Andreas Schenk
doaj +1 more source
Carbon Nanotube 3D Integrated Circuits: From Design to Applications
Advanced Functional Materials, Volume 35, Issue 34, August 22, 2025.As Moore's law approaches its physical limits, carbon nanotube (CNT) 3D integrated circuits (ICs) emerge as a promising alternative due to the miniaturization, high mobility, and low power consumption. CNT 3D ICs in optoelectronics, memory, and monolithic ICs are reviewed while addressing challenges in fabrication, design, and integration.
Han‐Yang Liu +3 more
wiley +1 more source
Switching Performance of Nanotube Core-Shell Heterojunction Electrically Doped Junctionless Tunnel Field Effect Transistor [PDF]
Journal of Optoelectronical Nanostructures, 2020 : In this paper, a novel tunnel field effect transistor (TFET) is introduced, thatdue to its superior gate controllability, can be considered as a promising candidate forthe conventional TFET. The proposed electrically doped heterojunction TFET(EDHJTFET)
Zahra Ahangari
doaj
1 Transistor‐Dynamic Random Access Memory as Synaptic Element for Online Learning
Advanced Intelligent Systems, Volume 7, Issue 8, August 2025.This work demonstrates the feasibility of utilizing capacitor‐less 1 transistor(1 T)‐dynamic random access memory as synaptic element with multilevel capability, large dynamic range of conductance, high linearity, ultralow energy consumption, high endurance exceeding 1015 cycles, and large integration density for artificial‐intelligence‐of‐things edge ...
MD Yasir Bashir +2 more
wiley +1 more source
Steep switching in trimmed-gate tunnel FET
AIP Advances, 2018 We propose a tunnel field-effect transistor (TFET) having a trimmed gate (TG) structure, which considerably improves the subthreshold swing (SS). The TG structure truncates the needless long band-to-band tunneling (BTBT) paths to a “channel”, which ...
Hidehiro Asai +5 more
doaj +1 more source