Results 81 to 90 of about 1,247 (194)
Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions
Applied Sciences, 2018 In this work, we demonstrate a strained Si single nanowire tunnel field effect transistor (TFET) with gate-all-around (GAA) structure yielding Ion-current of 15 μA/μm at the supply voltage of Vdd = 0.5V with linear onset at low drain voltages.
Keyvan Narimani +4 more
doaj +1 more source
A Review of Vertical Ga2O3 Diodes: From Fabrication to Performance Optimization and Future Outlooks
physica status solidi (b), Volume 262, Issue 8, August 2025.Gallium oxide (Ga2O3) diodes are emerging as promising components in power electronics, offering an ultrawide bandgap, high breakdown electric field, and cost‐effective growth methods. This article reviews recent advancements in Ga2O3 diodes, highlighting their fabrication techniques, performance in high‐voltage applications, and ongoing research ...
Jose Manuel Taboada Vasquez, Xiaohang Li
wiley +1 more source
Small, Volume 21, Issue 30, July 29, 2025.This review categorizes ML‐TMDs into commensurate and incommensurate structures and examines their effects on electronic band structures, optical responses, ferroelectricity, and the anomalous Hall effect. It discusses synthetic methods, such as mechanical stacking, chemical vapor deposition (CVD), interfacial epitaxy, and hypotaxy, and introduces the ...
Hyun‐Geun Oh +7 more
wiley +1 more source
Advanced Electronic MaterialsCompact in‐memory computing architectures are desirable to embed artificial intelligence (AI) in resource‐restricted edge devices. However, current technologies face limitations in both the area and energy efficiency. Here, a reconfigurable ferroelectric
Zhongyunshen Zhu +2 more
doaj +1 more source
A New On-Chip ESD Strategy Using TFETs-TCAD Based Device and Network Simulations
IEEE Journal of the Electron Devices Society, 2018 For the first time, this paper reports the quasi-static behavior and the applicability of the tunnel field effect transistor (TFET) for the on-chip electrostatic discharge (ESD) protection. ESD evaluations are performed on 28-nm fully depleted silicon-on-
Radhakrishnan Sithanandam +1 more
doaj +1 more source
IEEE Journal of the Electron Devices Society, 2015 Tunnel field effect transistors (TFETs) have emerged as one of the most promising post-CMOS transistor technologies. In this paper, we: 1) review the perspectives of such devices for low-power high-frequency analog integrated circuit applications (e.g ...
Leonardo Barboni +2 more
doaj +1 more source
DC ANALYSIS OF p-n-p-n TUNNELING FIELD-EFFECT TRANSISTOR BASED ON In0.35Ga0.65As
Holos, 2018 Using calibrated simulations, we report the In0.35Ga0.65As based tunnel field-effect transistor (TFET) with thin δ-doped n+ pocket at the source-channel interface to improve the parameters such as on current (Ion), off-current (Ioff) and subthreshold ...
Behnam Dorostkar, Saeid Marjani
doaj +1 more source
Random Dopant Fluctuation Effects of Tunneling Field-Effect Transistors (TFETs) [PDF]
Journal of the Institute of Electronics and Information Engineers, 2012 Jung-Shik Jang +2 more
openaire +1 more source
Performance Study and Analysis of Heterojunction Gate All Around Nanowire Tunneling Field Effect Transistor [PDF]
Journal of Optoelectronical Nanostructures, 2019 In this paper, we have presented a heterojunction gate all around nanowiretunneling field effect transistor (GAA NW TFET) and have explained its characteristicsin details.
Mahsa Roohy, Reza Hosseini
doaj
IET Circuits, Devices and SystemsThis study explores the impact of integrating a gallium arsenide (GaAs) pocket at the source and drain in a dual-material gate-oxide-stack double-gate tunnel field-effect transistor (DMGOSDG-TFET).
Km. Sucheta Singh +4 more
doaj +1 more source