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An Efficient FeFET-Based Compute-In-Memory Macro Readout Inspired by the 3T Pixel Array Cell
This paper proposes an In-Memory Computing (IMC) FeFET-based macro for ÁI acceleration. Central to this concept is the adoption of a novel readout circuit inspired by the proven efficiency of the 3T pixel array cell. Designed in 28 nm GF technology, this
Laleni, Nellie, Kämpfe, Thomas
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FeFET Process Integration and Characterization
, 2019 Hafnium oxide-based ferroelectrics are gaining popularity in the field of non-volatile memory due to their superior scalability in reference to traditional, lead-based ferroelectric materials and their compatibility with CMOS technology.
Merkel, Jordan
core
Ferroelectric field-effect-transistor (FEFET) has emerged as a scalable solution for 3D NAND and embedded flash (eFlash), with recent progress in achieving large memory window (MW) using metal-insulator-ferroelectric-insulator-semiconductor (MIFIS) gate ...
Kim, Sang-Hyeon +4 more
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In-memory computing (IMC) architecture emerges as a promising paradigm, improving the energy efficiency of multiply-and-accumulate (MAC) operations within deep neural networks (DNNs) by integrating the parallel computations within the memory arrays ...
Yang, Zeyu +5 more
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Hyperdimensional computing (HDC) is an emerging paradigm that employs hypervectors (HV s) to emulate cognitive tasks. In HDC, the most time-consuming and power-hungry process is encoding, the first step that maps raw data into HV s.
Wu, Juejian +7 more
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Report on final chip with CMOS and BEOL FeFET
IBM and HZB will deliver a report illustrating the structural integration cross section flow and the functionality of the ...
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PZT Based MFS Structure for FeFET
Integrated Ferroelectrics, 2003Fabrication and properties of lead zirconate titanate (PZT) thin films have been studied for Metal-Ferroelectric-Semiconductor FET (MFSFET) devices. PZT based MFS capacitors using lead titanate (PT) as seeding layers have been respectively prepared on p-type ⟨111⟩ and n-type ⟨100⟩ silicon wafers directly by a sol-gel method.
Chao-Gang Wei +2 more
exaly +2 more sources
On the Reliability of FeFET On-Chip Memory
IEEE Transactions on Computers, 2022FeFET is a promising technology for non-volatile on-chip memories. It is rapidly attracting an ever-increasing attention from industry. The advantage of FeFETs is full compatibility with the existing CMOS process beside their low power consumption. To enable ultra-dense memories, 1-FeFET AND arrays were proposed in which a memory cell is formed from a ...
Paul R. Genssler +3 more
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Variability sources and reliability of 3D — FeFETs
2021 IEEE International Reliability Physics Symposium (IRPS), 2021Discovery of ferroelectricity (FE) in binary oxides enables the advent of FE memories and a plethora of novel CMOS compatible building blocks spanning from the logic domain to high-density storage and neuromorphic computing. In this paper we develop the first comprehensive model of vertical Ferroelectric Field Effect Transistor, V-FeFET, to identify ...
Pesic M. +12 more
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Computing in memory with FeFETs
Proceedings of the International Symposium on Low Power Electronics and Design, 2018Data transfer between a processor and memory frequently represents a bottleneck with respect to improving application-level performance. Computing in memory (CiM), where logic and arithmetic operations are performed in memory, could significantly reduce both energy consumption and computational overheads associated with data transfer.
Dayane Alfenas Reis +2 more
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