Results 81 to 90 of about 1,280 (239)
In this work, low‐resolution infrared imaging is combined with a 28 nm FeFET IMC architecture to enable compact, energy‐efficient edge inference. MLC FeFET devices are experimentally characterized, and controlled multi‐level current accumulation is validated at crossbar array level.
Alptekin Vardar +9 more
wiley +1 more source
This article presents the world's first demonstration of a neural network SPICE integration platform (NSIP) for simulating synaptic weights in HfZrO (HZO)‐based ferroelectric field‐effect transistor (FeFET) crossbar arrays tailored for neuromorphic ...
Juhwan Park +3 more
doaj +1 more source
Silicon Nitride Resistive Memories
Amorphous SiNx is an attractive resistance switching material for ReRAM applications due to its physicochemical properties, such as humidity resistance, low oxygen diffusivity, and is used as a metal diffusion blocker. By modifying the ratio between N and Si atoms, the microstructure of the SiNx is affected, rendering it possible to change the ...
Alexandros‐Eleftherios Mavropoulis +7 more
wiley +1 more source
Enhanced Polarization Switching in HfZrO2 MFS FeFET Using WOx Interlayer
We demonstrate that the memory window (MW) of HfZrO2 (HZO)-based ferroelectric field-effect transistors (FeFETs) with an InZnO channel/HZO/W gate stack can be noticeably widened to over 2 V by introducing an amorphous WO2.7 interlayer (IL) into the gate ...
Eunjin Kim +3 more
doaj +1 more source
Analog content-addressable memory from complementary FeFETs
To address the increasing computational demands of artificial intelligence (AI) and big data, compute-in-memory (CIM) integrates memory and processing units into the same physical location, reducing the time and energy overhead of the system. Despite advancements in non-volatile memory (NVM) for matrix multiplication, other critical data-intensive ...
Xiwen Liu +8 more
openaire +3 more sources
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez +10 more
wiley +1 more source
Ferroelectric compute-in-memory annealer for combinatorial optimization problems
Computationally hard combinatorial optimization problems (COPs) are ubiquitous in many applications. Various digital annealers, dynamical Ising machines, and quantum/photonic systems have been developed for solving COPs, but they still suffer from the ...
Xunzhao Yin +13 more
doaj +1 more source
Artificial Intelligence for Fluorite Ferroelectric Materials: From Discovery to Optimization
Artificial intelligence accelerates the discovery and optimization of HfO2‐based fluorite ferroelectrics by linking synthesis, structure, properties, and device performance. Machine learning, deep‐learning analysis, and AI‐driven atomistic modeling enable predictive design, dopant screening, and closed‐loop optimization toward next‐generation ...
Faizan Ali +3 more
wiley +1 more source
Capacitive, charge‐domain compute‐in‐memory (CIM) stores weights as capacitance,eliminating DC sneak paths and IR‐drop, yielding near‐zero standbypower. In this perspective, we present a device to systems level performance analysis of most promising architectures and predict apathway for upscaling capacitive CIM for sustainable edge computing ...
Kapil Bhardwaj +2 more
wiley +1 more source
S.665-668We report 1-3 bit/cell FeFET operation through optimized HSO and HZO ferroelectric laminate layers using alumina interlayers. Memory window up to 3.5V, switching speed of 300ns, 10 years retention, and 10 4 endurance are reported. The gate stack
Steinke, P. +16 more
core +1 more source

