Results 91 to 100 of about 347 (149)

Central venous access device adverse events in pediatric patients with cancer: a systematic review and meta-analysis. [PDF]

Support Care Cancer
Nunn JL, Takashima MD, Wray-Jones EM, Soosay Raj TA, Hanna DMT, Ullman AJ.   +5 more
europepmc   +1 more source

High performance Si-MoS₂ heterogeneous embedded DRAM. [PDF]

Nat Commun
Xiao K, Wan J, Xie H, Zhu Y, Tian T, Zhang W, Chen Y, Zhang J, Zhou L, Dai S, Xu Z, Bao W, Zhou P.   +12 more
europepmc   +1 more source

Oxide semiconductor gain cell-embedded memory: materials and integration strategies for next generation on-chip memory. [PDF]

Commun Eng
Chung SW, Yoon SH, Jeong JK.
europepmc   +1 more source

Deletion of the <i>moe</i>A gene in <i>Flavobacterium</i> IR1 drives structural color shift from green to blue and alters polysaccharide metabolism. [PDF]

Elife
Escobar Doncel Á, Patinios C, Campos A, Walter Costa MB, Turkina MV, Murace M, Staals RHJ, Vignolini S, Dutilh BE, Ingham CJ.   +9 more
europepmc   +1 more source

Simultaneously Estimating Process Variation Effect, Work Function Fluctuation, and Random Dopant Fluctuation of Gate-All-Around Silicon Nanosheet Complementary Field-Effect Transistors. [PDF]

Nanomaterials (Basel)
Kola SR, Li Y.
europepmc   +1 more source

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Study of GIDL Improvement for 2T-SONOS Flash

2020 China Semiconductor Technology International Conference (CSTIC), 2020
The improvement of Gate induced drain leakage (GIDL) is studied in 2T SONOS (silicon-oxide-nitride-oxide-silicon) nonvolatile memory. High GIDL current from the select gate (SG) introduce inhibit disturb to the neighbor SONOS gate. It is found that these leakage bits impact the overall yield and reliability.
Zhenghong Liu, Liqun Dong, Ruisheng Qi, Shugang Dai, Guanqun Huang, Haoyu Chen, Chris Shao   +6 more
exaly   +2 more sources

HCD-Induced GIDL Increase and Circuit Implications

2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS), 2019
In this paper we review the physics of gate-induced drain leakage (GIDL) increase due to hot carrier degradation (HCD) and the proposed modelling for reliability simulations. A case study of an analog circuit where this phenomenon leads to an overall increase of static power consumption over time is shown.
Edoardo Ceccarelli, Kevin Manning, Giuseppe Macera, Dennis Dempsey, Colm Heffernan   +4 more
exaly   +2 more sources

Effect of substrate negative bias on GIDL current in LDD nMOSFET's

2011 International Conference on Mechatronic Science, Electric Engineering and Computer (MEC), 2011
The effect of substrate negative bias V B on the gate-induced drain leakage (GIDL) current is studied. It is found that the negative V B leads GIDL current curve shifts upwards. The shift of GIDL current ΔI D /I D increases with increasing |V B |. The GIDL current at V G =−0.2V (in the low field region) increases with increasing |V B | more largely ...
Lixin Guo, Du Huimin
exaly   +2 more sources

Crystallographic-orientation-dependent GIDL current in Tri-gate MOSFETs under hot carrier stress

Microelectronics Reliability, 2014
Abstract The Gate-Induced-Drain-Leakage (GIDL) current in Tri-gate MOSFETs for different crystal orientations and fin widths under hot carrier stress was systematically examined by comparing the experiments and a theoretical GIDL current model.
Jong Tae Park
exaly   +2 more sources