Results 21 to 30 of about 445 (155)

Optimization of Gate-All-Around Device to Achieve High Performance and Low Power with Low Substrate Leakage

open access: yesNanomaterials, 2022
In this study on multi-nanosheet field-effect transistor (mNS-FET)—one of the gate-all-around FETs (GAAFET) in the 3 nm technology node dimension—3D TCAD (technology computer-aided design) was used to attain optimally reduced substrate leakage from ...
Changhyun Yoo   +4 more
doaj   +1 more source

S-TAT Leakage Current in Partial Isolation Type Saddle-FinFET (Pi-FinFET)s

open access: yesIEEE Access, 2021
In this paper, we compare conventional saddle type FinFETs to partial isolation type saddle FinFETs (Pi-FinFETs) using 3D TCAD simulations to examine the effect of single charge traps for proper prediction of leakage current.
Jin Hyo Park   +5 more
doaj   +1 more source

Interface-state-induced degradation of GIDL current in n-MOSFETsunder hot-carrier stress [PDF]

open access: yes, 1996
The dependence of increase in post-stress gate-induced-drain-leakage (GIDL) current in n-MOSFET's on creation of interface states (ΔDit) during hot-carrier stress with VG = 0.5 VD was investigated.
Lai, PT, Zeng, X, Xu, JP, Liu, BY
core   +1 more source

Model‐Inversion‐Resistant Physical Unclonable Neural Network Using Vertical NAND Flash Memory

open access: yesAdvanced Science, Volume 13, Issue 25, 4 May 2026.
Schematic and key features of the proposed forward‐forward physical unclonable neural network (FF‐PUNN), incorporating a concealable physical unclonable function (PUF) layer and forward‐forward (FF) learning. ABSTRACT The growing use of neural networks in privacy‐sensitive applications necessitates architectures that inherently protect both data and ...
Sung‐Ho Park   +8 more
wiley   +1 more source

Extensionless UTBB FDSOI Devices in Enhanced Dynamic Threshold Mode under Low Power Point of View

open access: yesJournal of Low Power Electronics and Applications, 2015
This work presents an analysis about the influence of the gate and source/drain underlap length (LUL) on UTBB FDSOI (UltraThin-Body-and-Buried-oxide Fully-Depleted-Silicon-On-Insulator) devices operating in conventional (VB = 0 V), dynamic threshold (DT,
Katia Regina Akemi Sasaki   +4 more
doaj   +1 more source

Machine Learning‐Driven Variability Analysis of Process Parameters for Semiconductor Manufacturing

open access: yesAdvanced Intelligent Systems, Volume 8, Issue 5, May 2026.
This research presents a machine learning approach that integrates nonlinear variation decomposition (NLVD) with statistical techniques to quantify the contribution of individual unit processes to performance and variance of figure of merit (FoM) at the LOT level.
Sinyeong Kang   +6 more
wiley   +1 more source

GIDL characteristics on Si1-xGex pFinFET for Low Power Transistors [PDF]

open access: yes, 2016
학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2016. 2. 신형철.This dissertation presents an investigation of Gate-Induced-Drain-Leakage (GIDL) current in SiliconGermanium (SiGe) p-type FinFET for low power transistors and proposes the guidelines to reduce GIDL current.
강덕승
core  

Incremental Pulse-Width Erase (IPWE) Scheme for Fast and Variation-Tolerant GIDL Erase of 3D NAND Flash

open access: yesMicromachines
In this work, we propose an incremental pulse-width erase (IPWE) scheme for fast and variation-tolerant gate-induced drain leakage (GIDL) erase of 3D NAND flash.
Youngjun Park, Wonbo Shim
doaj   +1 more source

Spectrally Tunable 2D Material‐Based Infrared Photodetectors for Intelligent Optoelectronics

open access: yesAdvanced Functional Materials, Volume 36, Issue 27, 2 April 2026.
Intelligent optoelectronics through spectral engineering of 2D material‐based infrared photodetectors. Abstract The evolution of intelligent optoelectronic systems is driven by artificial intelligence (AI). However, their practical realization hinges on the ability to dynamically capture and process optical signals across a broad infrared (IR) spectrum.
Junheon Ha   +18 more
wiley   +1 more source

Gated-Diode Memory Cell and Array Utilizing GIDL Current [PDF]

open access: yes, 2014
학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2014. 2. 이종호.In this dissertation, the gated-diode memory cell and array utilizing the gate-induced drain leakage (GIDL) current is proposed and investigated for ultra-high density memory device.
이주완
core  

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