Results 11 to 20 of about 831 (177)

Hardware Acceleration of Stochastic Neural Networks Enabled by Bit-Cell Level Co-Design of Magnetic Tunnel Junctions. [PDF]

Adv Sci (Weinh)
An MTJ‐based probabilistic processing‐in‐memory architecture unites nonvolatile storage, local entropy generation, and stochastic computation within each memory cell. Stored multi‐bit weights are converted directly into programmable stochastic bitstreams, enabling neural‐network inference, adaptive Ising optimization, and uncertainty‐aware Bayesian ...
Wang Q, Koh D, McGoldrick B, Mocioi T, Fan Y, Baldo M, Liu L.   +6 more
europepmc   +2 more sources

Magnetoelectric Multiferroics for the Next-Generation Ultralow-Power Electronics. [PDF]

Adv Sci (Weinh)
Magnetoelectric coupling provides a unifying route from electric‐field control of magnetic order to non‐volatile MeRAM, MESO logic, and emerging antiferromagnetic and magnonic devices. By connecting switching physics with device benchmarks, material platforms, and integration strategies, distinctive technological opportunities are identified alongside ...
Liu Y, Sun Y, Luo H, Zhao D, Zeng Y, Zhang X, Liu Z, Peng H, Zhang Z, Yang J, Zhang J, Wang D, Shi J, Li S.   +13 more
europepmc   +2 more sources

Proactively Invalidating Dead Blocks to Enable Fast Writes in STT-MRAM Caches

IEEE Access, 2022
Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) is a promising emerging memory technology for on-chip caches. It has a low read access time and low leakage power. Unfortunately, however, STT-MRAM suffers from its long write latency and high
Yongjun Kim, Yuze Chen, Yongho Lee, Limei Peng, Seokin Hong   +4 more
doaj   +1 more source

Benchmarking and Optimization of Spintronic Memory Arrays

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2020
In this article, we present a cross-layer optimization and benchmarking of various spintronic memory devices, including spin-transfer-torque magnetic random access memory (STT-MRAM), spin-orbit-torque (SOT) MRAM, voltage-controlled exchange coupling ...
Yu-Ching Liao, Chenyun Pan, Azad Naeemi
doaj   +1 more source

A Nonvolatile Compute-in-Memory Macro Using Voltage-Controlled MRAM and In Situ Magnetic-to-Digital Converter

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2023
Compute-in-memory (CIM) accelerator has become a popular solution to achieve high energy efficiency for deep learning applications in edge devices. Recent works have demonstrated CIM macros using nonvolatile memories [spin transfer torque (STT)-MRAM and ...
Vinod Kurian Jacob, Jiyue Yang, Haoran He, Puneet Gupta, Kang L Wang, Sudhakar Pamarti   +5 more
doaj   +1 more source

Materials Requirements of High-Speed and Low-Power Spin-Orbit-Torque Magnetic Random-Access Memory

IEEE Journal of the Electron Devices Society, 2020
As spin-orbit-torque magnetic random-access memory (SOT-MRAM) is gathering great interest as the next-generation low-power and high-speed on-chip cache memory applications, it is critical to analyze the magnetic tunnel junction (MTJ) properties needed to
Xiang Li, Shy-Jay Lin, Mahendra Dc, Yu-Ching Liao, Chengyang Yao, Azad Naeemi, Wilman Tsai, Shan X. Wang   +7 more
doaj   +1 more source

Sparse Code With Minimum Hamming Distance of Three for Spin-Torque Transfer Magnetic Random Access Memory

IEEE Access, 2023
Spin-torque-transfer magnetic random access memory (STT-MRAM) has recently emerged as a promising technology to replace dynamic random access memory (DRAM).
Thien An Nguyen, Jaejin Lee
doaj   +1 more source

A Comparative Study Between Spin-Transfer-Torque and Spin-Hall-Effect Switching Mechanisms in PMTJ Using SPICE

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2017
The spin transfer torque magnetoresistive random access memory (STT-MRAM) is the leading candidate for spin-based memories. Nevertheless, the high write energy and read disturbance of the STT-MRAM motivated researchers to find other solutions.
Ibrahim Ahmed, Zhengyang Zhao, Meghna G. Mankalale, SACHIN S. Sapatnekar, Jian-Ping Wang, Chris H. Kim   +5 more
doaj   +1 more source

MTJ-based random number generation and its application in SNN handwritten digits recognition

AIP Advances, 2023
Spiking Neural Networks (SNNs) that require synapse weight initialization using random numbers have been widely used in the neural morphological system. However, the random numbers generated by traditional digital circuits have certain repeatability, and
Xiaomi Chen, Hai Li, Haodong Fan, Jiayu Fu, Tiejun Zhou   +4 more
doaj   +1 more source

Screening of 193i and EUV lithography process options for STT-MRAM orthogonal array MTJ pillars

Micro and Nano Engineering, 2021
Spin-transfer torque magnetic random-access memory (STT-MRAM) is considered as the most promising candidate to replace the complementary metal-oxide-semiconductor (CMOS) based memories that are dominating the market in the last few decades.
Murat Pak, Wesley Zanders, Patrick Wong, Sandip Halder   +3 more
doaj   +1 more source