Results 11 to 20 of about 7,404,371 (262)
Simulation Study on the Charge Collection Mechanism of FinFET Devices in Single-Event Upset
Planar devices and FinFET devices exhibit significant differences in single-event upset (SEU) response and charge collection. However, the charge collection process during SEU in FinFET devices has not been thoroughly investigated. This article addresses
Hongwei Zhang +6 more
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Single-Event Upset Analysis and Protection in High Speed Circuits [PDF]
The effect of single-event transients (SETs) (at a combinational node of a design) on the system reliability is becoming a big concern for ICs manufactured using advanced technologies. An SET at a node of combinational part may cause a transient pulse at
Lofti-Kamran, P. +13 more
core +1 more source
The single event effect caused by space heavy ion radiation is one of the important factors affecting the safety and operation of spacecraft on orbit.
Zhang Binquan +10 more
doaj +1 more source
A High-Reliability 12T SRAM Radiation-Hardened Cell for Aerospace Applications
The static random-access memory (SRAM) cells used in the high radiation environment of aerospace have become highly vulnerable to single-event effects (SEE).
Ruxue Yao +6 more
doaj +1 more source
Measurements of Single Event Upset in ATLAS IBL
Published by Inst.
Balbi, G. +27 more
openaire +7 more sources
Single-Event-Upset Sensitivity Analysis on Low-Swing Drivers
Technology scaling relies on reduced nodal capacitances and lower voltages in order to improve performance and power consumption, resulting in significant increase in layout density, thus making these submicron technologies more susceptible to soft ...
Nor Muzlifah Mahyuddin, Gordon Russell
doaj +1 more source
This study analyzes the effects of the punch-through stop (PTS) layer and well depth in a bulk FinFET SRAM cell on the fraction of charge generated by an ion impact that is collected by the FinFET channel.
Antonio Calomarde +3 more
doaj +1 more source
Single event upset (SEU) has always been an important factor affecting the reliability of spacecraft electronic equipment, which can cause anomalies in electronic equipment in orbit, and can result in serious spacecraft failure. In order to master signal
ZHAO Zhendong;TAO Wenze;LI Yancun;CHENG Yi;ZHANG Qingxiang;AN Heng;QUAN Xiaoping;ZHANG Chenguang
doaj
Rule-Based Design for Low-Cost Double-Node Upset Tolerant Self-Recoverable D-Latch
This paper presents a low-cost, self-recoverable, double-node upset tolerant latch aiming at nourishing the lack of these devices in the state of the art, especially featuring self-recoverability while maintaining a low-cost profile.
Seyedehsomayeh Hatefinasab +4 more
doaj +1 more source
Investigation of Radiation Hardened TFET SRAM Cell for Mitigation of Single Event Upset
This study analyzes the soft error sensitivity of SRAM cell which employs double-gate tunnel field effect transistor (DG TFET). The mitigation technique for the data recovery after the heavy ion strike is discussed.
M. Pown, B. Lakshmi
doaj +1 more source

