Results 31 to 40 of about 13,512 (161)
Estimation of SEU Threshold Energy from Kitsat-1 Data Using AP-8 Model [PDF]
Journal of Astronomy and Space Sciences, 2001 KITSAT-1, launched in 1992, passes through Inner Van Allen Radiation Belt in which high energy protons cause single event upsets(SEUs) in the main memory of KITSAT-1 OBC(On-Board Computer)186.
Sung-Joon Kim +3 more
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Efficacy of Transistor Interleaving in DICE Flip-Flops at a 22 nm FD SOI Technology Node
Applied Sciences, 2022 Fully Depleted Silicon on Insulator (FD SOI) technology nodes provide better resistance to single event upsets than comparable bulk technologies, but upsets are still likely to occur at nano-scale feature sizes, and additional hardening techniques should
Christopher J. Elash +6 more
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Single event upset and mitigation technique in JLTFET based RF mixer
Results in EngineeringThis work deals with the study of single event effect (SEE) on RF mixer along with the mitigation technique. A 20 nm independent gate Junctionless Tunnel FET JLTFET (IGJLTFET) was first designed and based on its Id-Vg characteristics; RF mixer circuit ...
Aishwarya K, Lakshmi B
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Design of linear feedback shift register with single event upset resistance
Xibei Gongye Daxue XuebaoThe rapid development of China's aerospace industry has rendered the radiation-hardened integrated circuit design critically importance, especially for spacecraft chips requiring protection against cosmic high-energy particle effects.
TIAN Jiahao +3 more
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Mitigation of software errors produced by radiation from the space environment
Revista Elektrón, 2023 This paper presents the development and implementation of a software error mitigation technique with the aim of protecting functions to be used in space missions.
German Castro
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A low power and soft error resilience guard‐gated Quartro‐based flip‐flop in 45 nm CMOS technology
IET Circuits, Devices and Systems, 2021 Conventional flip‐flops are more vulnerable to particle strikes in a radiation environment. To overcome this disadvantage, in the literature, many radiation‐hardened flip‐flops (FFs) based on techniques like triple modular redundancy, dual interlocked ...
Sabavat Satheesh Kumar +4 more
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A Novel Low-Power and Soft Error Recovery 10T SRAM Cell
Micromachines, 2023 In SRAM cells, as the size of transistors and the distance between transistors decrease rapidly, the critical charge of the sensitive node decreases, making SRAM cells more susceptible to soft errors.
Changjun Liu, Hongxia Liu, Jianye Yang
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Single Event Upsets in NMOS Microprocessors
IEEE Transactions on Nuclear Science, 1981 Three advanced 16-bit NMOS microprocessors have been observed to suffer single event upset at a rate varying between one upset for every 8 × 1010 to one for every 2 × 1012 n/cm2-upset for cyclotron-produced neutrons with an average energy of 14 MeV. These rates are expected to vary, probably upward, with different types of programs.
Guenzer, C. S. +2 more
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A Radiation-Hardened Low-Power SRAM with Enhanced Write Capability for Space Applications
Applied SciencesWith continued scaling of CMOS technology, the critical charge required for state retention in SRAM cells has decreased, leading to increased vulnerability to radiation-induced soft errors such as single-event upsets (SEUs) and single-event multi-node ...
Sang-Jin Kim, Sung-Hun Jo
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Yuanzineng kexue jishu, 2022 Based on the test site at the Qinghai Tibet Plateau with an altitude of 4 300 m, atmospheric neutron single event effects of a 65 nm high speed large area static random access memory (SRAM) array were measured in real time.
ZHANG Zhangang;LEI Zhifeng;HUANG Yun;EN Yunfei;ZHANG Yi;TONG Teng;LI Xiaohui;SHI Qian;PENG Chao;HE Yujuan;XIAO Qingzhong;LI Jianke;LU Guoguang
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