Results 31 to 40 of about 312,838 (207)

Estimation of SEU Threshold Energy from Kitsat-1 Data Using AP-8 Model [PDF]

open access: yesJournal of Astronomy and Space Sciences, 2001
KITSAT-1, launched in 1992, passes through Inner Van Allen Radiation Belt in which high energy protons cause single event upsets(SEUs) in the main memory of KITSAT-1 OBC(On-Board Computer)186.
Sung-Joon Kim   +3 more
doaj  

Single event upset and mitigation technique in JLTFET based RF mixer

open access: yesResults in Engineering
This work deals with the study of single event effect (SEE) on RF mixer along with the mitigation technique. A 20 nm independent gate Junctionless Tunnel FET JLTFET (IGJLTFET) was first designed and based on its Id-Vg characteristics; RF mixer circuit ...
Aishwarya K, Lakshmi B
doaj   +1 more source

Design of linear feedback shift register with single event upset resistance

open access: yesXibei Gongye Daxue Xuebao
The rapid development of China's aerospace industry has rendered the radiation-hardened integrated circuit design critically importance, especially for spacecraft chips requiring protection against cosmic high-energy particle effects.
TIAN Jiahao   +3 more
doaj   +1 more source

Dynamic Robust Single-Event Upset Simulator

open access: yesJournal of Aerospace Information Systems, 2018
This paper presents the dynamic robust single-event upset simulator, which is a novel framework for fault injection on hardware (via onchip debugging) and simulation testbeds (via the Simics® full-...
Edward Carlisle, Alan George
openaire   +1 more source

System effects of single event upsets [PDF]

open access: yes7th Computers in Aerospace Conference, 1989
Single Event Upsets (SEUs) pose a serious threat to computer reliability and longevity. SEU effects are found at sea level, in airborne avionics, and in space. At the system level, SEUs in processors are controlled by replication and voting, watchdog processors, and tagged data schemes.
openaire   +1 more source

Measurements of Single Event Upset in ATLAS IBL

open access: yesJournal of Instrumentation, 2020
Effects of Single Event Upsets (SEU) and Single Event Transients (SET) are studied in the FE-I4B chip of the innermost layer of the ATLAS pixel system. SEU/SET affect the FE-I4B Global Registers as well as the settings for the individual pixels, causing, among other things, occupancy losses, drops in the low voltage currents, noisy pixels, and silent ...
Balbi, G.   +27 more
openaire   +6 more sources

Mitigation of software errors produced by radiation from the space environment

open access: yesRevista Elektrón, 2023
This paper presents the development and implementation of a software error mitigation technique with the aim of protecting functions to be used in space missions.
German Castro
doaj   +1 more source

A low power and soft error resilience guard‐gated Quartro‐based flip‐flop in 45 nm CMOS technology

open access: yesIET Circuits, Devices and Systems, 2021
Conventional flip‐flops are more vulnerable to particle strikes in a radiation environment. To overcome this disadvantage, in the literature, many radiation‐hardened flip‐flops (FFs) based on techniques like triple modular redundancy, dual interlocked ...
Sabavat Satheesh Kumar   +4 more
doaj   +1 more source

A Novel Low-Power and Soft Error Recovery 10T SRAM Cell

open access: yesMicromachines, 2023
In SRAM cells, as the size of transistors and the distance between transistors decrease rapidly, the critical charge of the sensitive node decreases, making SRAM cells more susceptible to soft errors.
Changjun Liu, Hongxia Liu, Jianye Yang
doaj   +1 more source

Physical Mechanisms Inducing Electron Single-Event Upset [PDF]

open access: yesIEEE Transactions on Nuclear Science, 2018
With the increase of sensitivity of devices to single-event upsets (SEUs), the possibility to trigger an upset with incident electrons has been recently raised. All the mechanisms susceptible to trigger the SEUs are investigated in detail. New measurements performed on the field programmable gate array static random access memory based from Xilinx ...
P. Caron   +6 more
openaire   +1 more source

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