Results 61 to 70 of about 101 (95)

Reduced overhead soft error mitigation using error control coding techniques

2011 IEEE 17th International On-Line Testing Symposium, 2011
Soft errors are one of the biggest reliability challenges for present day electronic devices. With technology scaling, the contribution of soft errors to overall device failure is on the rise and it is becoming the dominant reliability failure mechanism. Several techniques exist for the detection and correction of soft errors.
V. Prasanth 0001, Virendra Singh, Rubin A. Parekhji   +2 more
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Mitigation of Soft Errors in Implantable Medical Devices

2020 7th International Conference on Electrical and Electronics Engineering (ICEEE), 2020
Today, soft errors are one of the major design technology challenges in implantable medical devices (IMDs). IMDs such as pacemakers and implantable cardioverter defibrillators, relying on integrated-circuit technology, are susceptible to soft errors from energetic particles (neutron and alpha particles).
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A Soft-Minimum Method for NLOS Error Mitigation in TOA Systems

2016 IEEE 84th Vehicular Technology Conference (VTC-Fall), 2016
The accuracy of indoor positioning systems could be significantly reduced by non-line-of-sight (NLOS) propagation. The bulk of existing work on NLOS error mitigation for time-of-arrival (TOA) systems assumes that the NLOS links can be identified and/or the NLOS error statistics are known. To avoid requiring such information that is often unavailable in
Zhenqiang Su, Genfu Shao, Huaping Liu 0002   +2 more
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Soft error mitigation through selection of noninvert implication paths

2014 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2014
As transistor feature size scales down, soft errors in combinational logic because of high-energy particle radiation is gaining increasing concerns. In this paper, a soft error mitigation method based on accurate mathematical modeling of SER and addition of non-invert functionally redundant wires (FRWs) is proposed.
Bin Zhou, Thambipillai Srikanthan, Wei Zhang 0012   +2 more
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RAT: A Lightweight System-level Soft Error Mitigation Technique

2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC), 2020
To achieve a substantial reliability and safety level, it is imperative to provide electronic computing systems with appropriate mechanisms to tackle soft errors. This paper proposes a low-cost system-level soft error mitigation technique, which allocates the critical application function to a pool of specific general-purpose processor registers.
Jonas Gava, Ricardo Augusto da Luz Reis, Luciano Ost   +2 more
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Soft Error Mitigation in Switch Modules of SRAM-based FPGAs

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007
In this paper, we propose two techniques to mitigate soft error effects on the switch modules of SRAM-based FPGAs: 1) The first technique tolerates SEU-caused open errors based on a new programming method for SRAM-bits of switch modules, and 2) The second technique mitigates SEU-cause short errors in the switch modules based on a mixed programmable and
Zarandi, H., Miremadi, S.G., Dhiraj, Pradhan, Mathew, Jimson   +3 more
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Soft-Error Tolerance and Mitigation in Asynchronous Burst-Mode Circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2009
We discuss the problem of soft errors in asynchronous burst-mode machines (ABMMs), and we propose two solutions. The first solution is an error tolerance approach, which leverages the inherent functionality of Muller C-elements, along with a variant of duplication, to suppress all transient errors.
Sobeeh Almukhaizim, Feng Shi 0010, Eric Love, Yiorgos Makris   +3 more
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Circuit-Level Soft-Error Mitigation

2010
In nanometric technologies, circuits are increasingly sensitive to various kinds of perturbations. Soft errors, a concern in the past for space applications, became a reliability issue at ground level. Alpha particles and atmospheric neutrons induce single-event upsets (SEUs) affecting memory cells, latches, and flip-flops, and single-event transients (
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ISO26262-compliant soft-error mitigation in register banks

2017 22nd IEEE European Test Symposium (ETS), 2017
Temporary malfunction of ICs is often caused by Single Event Upsets (SEUs). That is why the automotive safety standard ISO 26262 demands measures to detect and mitigate a certain percentage of safety-critical SEUs. Different kinds of modules require different kinds of safety mechanisms. A frequently used module type is the Register Bank, which provides
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Experiences with software-based soft-error mitigation using AN codes

Software Quality Journal, 2014
Arithmetic error coding schemes are a well-known and effective technique for soft-error mitigation. Although the underlying coding theory is generally a complex area of mathematics, its practical implementation is comparatively simple in general. However, compliance with the theory can be lost easily while moving toward an actual implementation, which ...
Martin Hoffmann 0001, Peter Ulbrich, Christian Dietrich 0001, Horst Schirmeier, Daniel Lohmann, Wolfgang Schröder-Preikschat   +5 more
openaire   +1 more source