Results 91 to 100 of about 178 (144)
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IEEE Electron Device Letters, 2010
In this letter, we propose a new device, the Semi-Superjunction (SJ) (Semi-SJ) insulated-gate bipolar transistor (IGBT) (Semi-SJ IGBT). The device offers significant improvement in the on state and switching tradeoff compared with the state-of-the-art FieldStop Trench IGBT (FS IGBT).
Marina Antoniou +3 more
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In this letter, we propose a new device, the Semi-Superjunction (SJ) (Semi-SJ) insulated-gate bipolar transistor (IGBT) (Semi-SJ IGBT). The device offers significant improvement in the on state and switching tradeoff compared with the state-of-the-art FieldStop Trench IGBT (FS IGBT).
Marina Antoniou +3 more
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Superjunction by Wafer Direct Bonding
Japanese Journal of Applied Physics, 1995A pn-junction having a very abrupt impurity profile, called a “superjunction” in this study, was realized by wafer direct bonding (WDB) and low-temperature annealing. To eliminate voids during the low-temperature annealing, a wafer with trenches on the surface was used.
Hitoshi Yamaguchi +3 more
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2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019
The Super-Lattice Power Amplifier with Diamond Enhanced Superjunction (SPADES) device is being developed to enable a 2x increase in breakdown voltage of a Super-Lattice Castellated Field Effect Transistor (SLCFET) device. Incorporation of a diamond superjunction (SJ) within the drain region of a SLCFET was previously predicted to improve breakdown ...
Shamima Afroz +13 more
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The Super-Lattice Power Amplifier with Diamond Enhanced Superjunction (SPADES) device is being developed to enable a 2x increase in breakdown voltage of a Super-Lattice Castellated Field Effect Transistor (SLCFET) device. Incorporation of a diamond superjunction (SJ) within the drain region of a SLCFET was previously predicted to improve breakdown ...
Shamima Afroz +13 more
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JFET Depletion in SuperJunction Devices
2008 20th International Symposium on Power Semiconductor Devices and IC's, 2008SuperJunction theory predicts that specific on- resistance improves as the widths of the N- and P-type regions in the drift region are reduced. In this paper, it is shown that there is a practical limit to improving on-resistance by shrinking these widths, due to JFET depletion of the conducting regions.
Don Disney, Gary Dolny
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SPICE modelling of the superjunction IGBT
9th International Seminar on Power Semiconductors (ISPS 2008), 2008This paper presents a SPICE model of the Superjunction Insulated Gate Bipolar Transistor (SJIGBT). SPICE simulation results are in good agreement with the DESSIS simulation results under DC conditions. This model consists of an intrinsic MOSFET and a parallel combination of a wide and a narrow base pnp BJTs. A parasitic JFET is also included to account
M. Antoniou, F. Udrea, F. Bauer
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Study of reliability in superjunction power VDMOSFET
2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, 2012Comparing with CoolMOSTM, a new deep trench structure of superjunction power VDMOS has been developed in HHNEC. In this paper, we have studied main reliability failure mechanisms subjected to HTRB (High Temperature Reverse Bias). Positive improvement actions from both process and package assembly were showed.
Zeng-Yi Fan +4 more
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A Superjunction LDMOS with Steps Buried Oxide
Journal of Electronic Materials, 2018A superjunction (SJ) LDMOS with steps buried oxide (SBOX) is proposed in this paper. The SJ LDMOS with SBOX designed is based on the Enhanced Dielectric Field (ENDIF). The drift region is divided into three parts according to the depths of the SBOX, which gradually increases from source to drain in order to optimize the drift region charge ...
Lijuan Wu +6 more
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Theory of Semiconductor Superjunction Devices
Japanese Journal of Applied Physics, 1997A new theory of semiconductor devices, called “semiconductor superjunction (SJ) theory”, is presented. To overcome the trade-off relationship between breakdown voltage and on-resistance of conventional semiconductor devices, SJ devices utilize a number of alternately stacked, p- and n-type, heavily doped, thin semiconductor layers.
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Theory of 3-D Superjunction MOSFET
IEEE Transactions on Electron Devices, 2019The state-of-the-art superjunction (SJ) MOSFETs are based on the p-n pillar structures, arranged in a 2-D stripe geometry. This arrangement uses the superposition of the electric field components at the p-n junctions to create an enhanced depletion volume for higher breakdown capability.
H. Kang, F. Udrea
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A Review of Superjunction Vertical Diffused MOSFET
IETE Technical Review, 2012Superjunction has arguably been the most creative and important concept in power device field. Superjunction vertical diffused MOSFET (SJ VDMOS) has been commercialized and the research effort to l...
Jian Chen +4 more
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